Design Verification Intern, MS - Summer 2027

About the Team

Marvell's Design Verification teams span multiple domains, offering opportunities to work on technologies powering next-generation cloud, AI, storage, and networking solutions. Some teams focus on pre-silicon emulation and verification for ODSP-related chips. Others focus on ASIC Design, using UVM methodology to test SOC designs at block/cluster/full chip levels. Other teams focus on network connectivity from AI GPU board optics to top-of-rack optical fibers and active copper cables in data centers. Across all groups, you'll collaborate with your direct team and cross-functional partners (software, physical design, digital design, and more) to deliver robust, scalable solutions.

What You Can Expect

• Dive deep into the architecture of cutting-edge processors and learn how they function
• Use industry-standard tools to create simulation environments that mimic real-world conditions
• Develop automated tests that push designs to their limits, creatively trying to "break" the chip to find and troubleshoot hidden flaws and failed simulations
• Analyze test coverage results and metrics
• Collaborate with chip architects and designers to solve complex problems and contribute to building real products

What We're Looking For

• Currently enrolled in a Master's Degree in Electrical Engineering, Computer Engineering, or a related field with expected graduation between Fall 2027 – Summer 2028
• Completed courses in: computer architecture, logic, processor, memory system, Verilog, VLSI, VHDL, UVM, analog, integrated circuit design, digital logic design, SoC/ASIC design, verification principles, signals, system and signal processing
• Proficiency in programming and scripting languages: Python, C, C++, Perl, Java
• Experience using Synopsys, Cadence, or Mentor tools to run simulations and write/debug testbenches
• Hands-on experience with RTL integration and bring-up system
• Experience debugging complex hardware/software interactions
• Strong analysis, problem solving, and communication skills

Pay

Expected base pay range: $35 – $70 per hour. This role is also eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers.

Benefits

• Medical, dental, and vision coverage
• Perks and discounts
• Robust mental health resources
• Paid holidays
• Additional compensation may be available for intern PhD candidates