Design Verification Intern, BS - Summer 2027

What You Can Expect

• Dive deep into the architecture of our cutting-edge processors and learn exactly how they function
• Use industry-standard tools to create powerful simulation environments that mimic real-world conditions
• Develop smart, automated tests that push our designs to their limits, creatively trying to "break" the chip to find & troubleshoot hidden flaws & failed simulations
• Analyze test coverage results & metrics
• Collaborate with chip architects and designers to solve complex problems and contribute to a team building real products

What We're Looking For

• Currently enrolled in a Bachelor's Degree in Electrical Engineering, Computer Engineering, or a related field with an expected graduation date between Fall 2027 – Summer 2028
• Completed courses focusing on computer architecture, logic, processor, memory system, Verilog, VLSI, VHDL, UVM, analog, integrated circuit design, digital logic design, SoC/ASIC design, verification principles, signals, system and signal processing
• Proficiency in programming & scripting languages like Python, C, C++, Perl, Java
• Experience using tools like Synopsys, Cadence, or Mentor to run simulations and write & debug a testbench
• Hands-on experience with RTL integration and bring-up system
• Experience with debugging complex hardware/software interactions
• Strong analysis, problem solving, and communication skills

Pay

Expected base pay range: $30–59 per hour, determined based on job-related skills, experience, qualifications, work location and market conditions. This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers.

Benefits

Medical, dental, and vision coverage; perks and discounts; robust mental health resources; paid holidays. Additional compensation may be available for intern PhD candidates.