Design Engineer II

About the role

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The position is based in Austin. We’re doing work that matters. Help us solve what others can’t.

Responsibilities

• Work with the existing functional verification environment to add new features into the verification environment.
• Ensure various customer configurations are clean as part of verification regressions.
• Support customers in case of any issues with using the verification environment.
• Perform functional and code coverage analysis.
• Ensure the design aligns with the technical and quality requirements set for the team, particularly with respect to quality metrics.
• Lead the verification effort and contribute to the functional verification of Cadence's Memory Controller IP.

Requirements

• BS/MS in Electrical or Computer Engineering.
• At least 2‑3 years of relevant experience, including design verification experience.

Qualifications

• Strong background in functional verification fundamentals, environment planning, test plan generation, and environment development.
• UVM‑based functional verification environment development is required.

Skills

• AXI and/or CHI‑E experience is highly desirable.
• DDR Memory experience is highly desirable.
• Memory controller verification experience is desirable.