DESIGN ENGINEER I

About the role

We are a small group of individuals designing among the most complex chip in the world getting into the award-winning Cadence Design Systems Palladium platform. As such we are seeking an experienced DFT engineer whose role will span across the full spectrum of the DFT implementation: from architecture definition through silicon testing and debug. A bonus, this individual will have cross functional teams’ interactions not only within our group; but across Cadence and the multiple BU involved in our developments.