Defect Reduction Engineer

Position Summary

As a Defect Reduction Engineer, the candidate will support defect control and reduction work in a high volume 24x7 manufacturing environment, on purpose to achieve yield and performance goals.

Role And Responsibilities

• Supporting New Product Introduction (NPI) as the Defect Reduction representative: attending meetings, presenting inline inspection strategy & methodology, supporting GPM set up, spec audits, and comparison, evaluating unit part process changes and tool spreads in terms of inline and NPW defectivity data.
• Performing fab process/tool trend data and correlation analysis to identify dog tools, trace defects to root cause, and rapidly take action to prevent inline process excursions.
• Working cross-functionally with YE/PIE/UP to evaluate defect data on BKMs & projects, excursion monitoring & control, SWLY reduction.
• Establishing FCC (Failed Chip Count) and trend monitoring plans for new technology introductions and ramps (14nm & foundry) and existing legacy production nodes (45nm/32nm/28nm) in order to achieve yield and performance goals, and support on weekly module meetings & activities.
• Responding to foundry customer requests and delivering the data & analysis to meet expectation.
• Supporting new technology and process transfer projects from Samsung HQ (South Korea).

Skills And Qualifications

• Requires a Bachelor's degree in Electrical, Chemical, Mechanical Engineering, Material Science, Chemistry, Physics or related technical fields.
• Requires a minimum of 10 years of Semiconductor process engineering experience in defect monitor and reduction.
• Experience in leading logic technology (45nm or below) development is strongly preferred.
• Relevant experience in advanced defect inspection and review tools (bright field, dark field, e-beam, Vis-edge…etc) is strongly preferred.
• Knowledge of Klarity Defect (or similar) software and its application in a semiconductor processing environment is useful.
• Working knowledge in SPC and DOE methodology is required.
• Excellent communication skills (written, verbal and presentation) and experience as a contributing member of cross functional teams is required.
• Strong data mining, troubleshooting skills and an energetic self-starter personality preferred.
• Strong organizational skills to manage multiple tasks and able to react to shifting priorities.
• Ability to meet deadlines, schedules and commitments is required.

Pay

• The current base salary range for this role is between $76,000–$145,000. Individual base pay rates will depend on factors including duties, work location, education, skills, qualifications and experience.
• Total compensation for this position will include a competitive benefits package and may include participation in company incentive compensation programs, which are based on factors to include organizational and individual performance.

Benefits

• Medical, dental, and vision insurance
• Life insurance and 401(k) matching with immediate vesting
• Onsite café(s) and workout facilities
• Paid maternity and paternity leave
• Paid time off (PTO) + 2 personal holidays and 10 regular holidays
• Wellness incentives and MORE
• Eligible full-time employees (salaried or hourly) may also receive MBO bonuses based on company, division, and individual performance.
• All positions at Samsung Austin Semiconductor are full-time on-site.