CPU Core Pre-Si Validation/Verification Engineer

Job Description

As a CPU Core Pre-Silicon Validation/Verification Engineer, responsibilities will include but are not limited to:

• Performs functional verification of CPU logic to ensure design will meet specification requirements.
• Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to CPU microarchitecture specifications.
• Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
• Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements corrective measures to resolve failing tests.
• Collaborates with CPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
• Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
• Maintains and improves existing functional verification infrastructure and methodology.
• Participates in the definition of architecture and microarchitecture features of the CPU being designed actively.

Qualifications

• Bachelor's degree in Electrical/Computer Engineering, Computer Science or other Science/Engineering related field and 1+ years of experience
• Master's degree in Electrical/Computer Engineering, Computer Science or other Science/Engineering and some knowledge of related field in: Pre-silicon verification and/or front end.
• Software/programming languages (i.e. C, C++, C#, Visual Basic/.NET. Perl, Python, Java, etc.).
• System Verilog/Verilog/VHDL, Verification, Validation and/or VCS or similar Simulator.

Requirements

• Minimum of 6 months experience with computer architecture and microarchitecture.
• Experience with coverage driven validation.
• Experience in IP/SOC ASIC Validation.
• Experience in Specman E and/or System Verilog/OVM/UVM.
• Familiarity with x86 core architecture and instruction set.

Pay

$122,440.00 - 172,860.00 USD

Schedule

Shift 1 (United States of America)

Primary Location

US, California, Folsom