Senior CPU Pre-Silicon Verification Engineer

Job Details

Responsibilities

• Lead, drive, develop and execute functional verification of CPU logic to ensure design will meet specifications.
• Develop IP verification plans, test benches, and the verification environment to ensure coverage meets CPU microarchitecture specifications.
• Execute verification plans and define and run system simulation models to verify the design, analyze power and timing, and uncover bugs.
• Replicate, root cause, and debug issues in the pre-silicon environment.
• Find and implement corrective measures to resolve failing tests.
• Collaborate with CPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, power goals and schedule.
• Document test plans and drive technical reviews of plans and proofs with design and architecture teams.
• Maintain and improve existing functional verification infrastructure and methodology.
• Participate in the definition of architecture and microarchitecture features of the CPU being designed actively.
• Able to lead and drive small team.

Qualifications

• The candidate must have a Bachelor's Degree in Electrical/Computer Engineering or any related field with 8+ years of relevant experience -OR- Master's in Electrical/Computer Engineering or any related field with 7+ years of relevant experience -OR- PhD in Electrical/Computer Engineering or any related field with 4+ years of relevant experience in required skills section.
• Experience in Design Verification and Validation methodologies with UVM, System Verilog and industry standard EDA tools.
• Experience in digital logic design, including instruction set execution, ALUs, control units, registers, memory, and system buses.
• Experience in developing UVM-based testbenches for reusable and scalable verification environments.
• Experience in at least one scripting language (e.g., Python, Perl, bash), C/C++, and System Verilog.

Preferred Qualifications

• Experience with RTL development.
• Use of AI agents in Verification.
• Proficiency with C/C++, System Verilog coding and debug.
• Knowledge and experience with x86 or any other computer architectures.
• Familiarity with version control software (GIT).
• Experience with Synopsys simulators.

Pay

Annual Salary Range for jobs which could be performed in the US: $164,470.00 - 311,890.00 USD

Schedule

Shift 1 (United States of America)

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.