Control Logic and PLC Debugger

About the role

We are looking for a Control Logic and PLC Debugger. You'll build control logic debugging tasks around an automated machine, line or process cell you have worked on, so a leading AI company can measure how well models handle real embedded engineering problems. Engagement details: Location: Wisconsin, Working model: Hybrid, Start date: ASAP, Employment type: Freelance – hourly rate: $70–90 (paid per accepted task).

Responsibilities

• Build a benchmark environment around an automated machine, line or process cell you have worked on
• Include the PLC program in ladder, structured text or function blocks (IEC 61131-3 or similar), the I/O map, device and drive datasheets, the sequence and interlock specification, alarm and event logs, and a simulator or test harness for the process
• Set up the tools the work needs – an IEC 61131-3 runtime or compiler such as OpenPLC or MATIEC, the process simulator, Python, PDF tools
• Write five or more tasks, each built on a sequence, interlock or recipe fault on that cell (e.g. a sequence that stalls when one sensor responds late, an interlock that can be bypassed on restart, a recipe change that breaks a dosing step)
• Frame each task so the model must work through the program and logs, change the logic, run it against the simulator, and deliver the patched program plus answer.json naming the change
• Write a hidden marking script that runs the patched program through the normal sequence and hidden fault scenarios – a late sensor, a drive trip, power loss mid-cycle, an operator restart – scoring 0.0 to 1.0 by the share that end in a safe and correct state
• Design tasks where the naive fix passes the normal sequence but fails a fault path
• Supply your own answer (scoring 1.0) and a naive answer a competent engineer might give first (scoring below 0.3)

Qualifications

• Hands-on controls engineering experience on an automated machine, line or process cell
• Strong PLC programming skills in ladder, structured text or function blocks (IEC 61131-3 or similar)
• Experience designing and debugging sequences, interlocks and recipes
• Able to work from I/O maps, device and drive datasheets, and sequence and interlock specifications
• Experience diagnosing faults from alarm and event logs
• Comfortable with IEC 61131-3 runtimes or compilers such as OpenPLC or MATIEC, and process simulators or test harnesses
• Python skills to write automated marking scripts

Pay

Freelance – hourly rate: $70–90 (paid per accepted task)