Associate Staff Design Modeling Egineer

About the role

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. The Digital Subsystems team is responsible for the research and development of digital architectures and IPs from concept to production. We develop compute engines (AI/ML), processors (RISC-V), accelerators, peripherals, and system IP. We develop IC architectures for multi-core, multi-threaded SoCs with an energy-efficient compute backbone for IoT connectivity, security, and sensing subsystems. Our activities include advanced research and development, high-level modeling, architecture, RTL design, timing/power/area optimization, and formal and UVM verification within an automated framework. We value innovation, simplicity, quality, and smart development processes within a highly collaborative and learning-driven team.

Responsibilities

• Architect and develop hardware/software solutions to product-driven requirements
• Write functional models to enable IP development
• Write performance models to enable architectural analysis
• Develop virtual hardware platforms for simulation
• Propose improvements to the hardware architecture
• Write application-level and driver-level software
• Mentor and provide technical leadership to junior modelers
• Define and maintain our modeling framework

Skills

• Bachelors/MS/PhD Electrical or Computer Engineering degree or similar
• Proficiency in C or C++ is required
• Knowledge of object-oriented concepts is required
• Experience with Embedded C or Assembly is required
• Experience in hardware architecture or modeling is required
• Experience working in a Linux environment and writing scripts is required
• Knowledge of building executables and libraries from source is required
• Digital Design and verification experience is desired
• Experience with a modeling framework is required (e.g., Renode, Python, Modern C++, or SystemC)
• Experience with CMake, Visual Studio Code, and RTL simulation software is useful
• Familiarity with revision control and continuous integration is desired

Benefits

• Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental and vision plans
• Highly competitive salary
• 401k plan with match and Roth plan option
• Equity rewards (RSUs)
• Life/AD&D and disability coverage
• Flexible spending accounts
• Adoption assistance
• Back-Up childcare
• Additional benefit options (Commuter benefits, Legal benefits, Pet insurance)
• Flexible PTO schedule
• 3 paid volunteer days per year
• Charitable contribution match
• Tuition reimbursement
• Free downtown parking
• Onsite gym
• Monthly wellness offerings
• Free snacks
• Monthly company updates with our CEO

Pay

The annualized base pay range for this role is expected to be between $124,600 - $231,400 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant’s skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package.