ASIC & FPGA Verification Engineer Sr Stf - E5
Lockheed Martin · Denver, CO · 1 mo ago
OTHR$185k–$344k/yrFull-time
We need to output HTML fragment with sections: headings for sections like About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule. We must not repeat job title as heading. We must include only sections with real specific content. Remove boilerplate, navigation, legal, EEO, etc. Also remove application instructions. The posting includes a lot of description.
We need to parse content:
- Intro paragraph: "Please join us as an ASIC & FPGA Verification Engineer, where you will be working within the central ASIC & FPGA Engineering division for Lockheed Martin Space. You will have the opportunity to support over 50 different programs and research and development (R&D) efforts. Your work will affect technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions."
- Then "In This Role, You Will Work with low SWaP, radiation hardened, space rated devices.Devise a unique verification plan for a given design.Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.Develop requirements, test cases, build test benches, generate reports, and document verification results.Work with an independent design team to document and resolve bugs found in the design.Support all aspects of ASIC and FPGA development, to include architecture, design, and analysis.Support technical reviews, and be able to present to internal and external stakeholders."
- Then "The information below reflects the standard job description for this position: Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and system simulation. Assignments include the analysis of all aspects from high-level design to synthesis, place and route, and timing and power utilization. Typically uses specialized equipment to establish operation data, conduct experimental tests, and evaluate results."
- Then Basic Qualifications list.
- Then Desired Skills list.
- Then Pay Information: Full-Time Salary Range: $185400.00 - $344400.00 and some text about salary.
- Then Benefits offered: list.
- Then mention about annual short-term/long-term incentive compensation programs.
- Then Washington state specifics (maybe we can include as part of Benefits? It's specific to WA applicants; but we can keep as part of Benefits or maybe as a note. The instruction: include a section ONLY when posting has real, specific content for it. Benefits section is present. Pay section present. Schedule? Not explicitly given; there is mention of flexible work arrangements and schedules (e.g., 4x10) within Benefits. So schedule not separate; we can include schedule under Benefits or maybe not separate. The instruction says we can have Schedule section only if posting actually states them. It does mention flexible work arrangements and schedules (e.g., 4x10) but that's within Benefits. Could we create a Schedule section? Probably not, because it's not a dedicated schedule description; it's part of benefits. Safer to not create Schedule section.
- Also we need to avoid repeating job title as heading. So we will not have heading "ASIC & FPGA Verification Engineer". We'll have sections: About the role (maybe we can call it About the role), Responsibilities, Requirements (maybe Basic Qualifications), Qualifications (maybe Desired Skills?), Skills, Benefits, Pay. But we need to avoid duplication. The instruction: use
for sections like About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule. We must not repeat job title as heading. We must include only sections with real specific content. Remove boilerplate, navigation, legal, EEO, etc. Also remove application instructions. The posting includes a lot of description.
We need to parse content:
- Intro paragraph: "Please join us as an ASIC & FPGA Verification Engineer, where you will be working within the central ASIC & FPGA Engineering division for Lockheed Martin Space. You will have the opportunity to support over 50 different programs and research and development (R&D) efforts. Your work will affect technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions."
- Then "In This Role, You Will Work with low SWaP, radiation hardened, space rated devices.Devise a unique verification plan for a given design.Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.Develop requirements, test cases, build test benches, generate reports, and document verification results.Work with an independent design team to document and resolve bugs found in the design.Support all aspects of ASIC and FPGA development, to include architecture, design, and analysis.Support technical reviews, and be able to present to internal and external stakeholders."
- Then "The information below reflects the standard job description for this position: Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and system simulation. Assignments include the analysis of all aspects from high-level design to synthesis, place and route, and timing and power utilization. Typically uses specialized equipment to establish operation data, conduct experimental tests, and evaluate results."
- Then Basic Qualifications list.
- Then Desired Skills list.
- Then Pay Information: Full-Time Salary Range: $185400.00 - $344400.00 and some text about salary.
- Then Benefits offered: list.
- Then mention about annual short-term/long-term incentive compensation programs.
- Then Washington state specifics (maybe we can include as part of Benefits? It's specific to WA applicants; but we can keep as part of Benefits or maybe as a note. The instruction: include a section ONLY when posting has real, specific content for it. Benefits section is present. Pay section present. Schedule? Not explicitly given; there is mention of flexible work arrangements and schedules (e.g., 4x10) within Benefits. So schedule not separate; we can include schedule under Benefits or maybe not separate. The instruction says we can have Schedule section only if posting actually states them. It does mention flexible work arrangements and schedules (e.g., 4x10) but that's within Benefits. Could we create a Schedule section? Probably not, because it's not a dedicated schedule description; it's part of benefits. Safer to not create Schedule section.
- Also we need to avoid repeating job title as heading. So we will not have heading "ASIC & FPGA Verification Engineer". We'll have sections: About the role (maybe we can call it About the role), Responsibilities, Requirements (maybe Basic Qualifications), Qualifications (maybe Desired Skills?), Skills, Benefits, Pay. But we need to avoid duplication. The instruction: use for section headings (e.g. About the role, Responsibilities, Requirements, Qualifications, Skills, Benefits, Pay, Schedule). So we can choose which sections to include based on content.
We have:
- About the role: introductory paragraph describing role, opportunity, impact.
- Responsibilities: the list of duties: "In This Role, You Will ..." plus the standard job description paragraph.
- Requirements: Basic Qualifications.
- Qualifications: maybe Desired Skills? But they said Qualifications separate from Skills? Could treat Desired Skills as Qualifications or Skills. We'll have both Qualifications and Skills sections if content distinct. Basic Qualifications are requirements; Desired Skills are desired skills/experience. Could map Basic Qualifications to Requirements, Desired Skills to Qualifications or Skills. Let's decide: Requirements = Basic Qualifications. Qualifications = Desired Skills (maybe also include some of the desired skills). Skills = maybe we can list specific technical skills like SystemVerilog, UVM, VHDL, Verilog, scripting, etc. But Desired Skills already includes many. To avoid duplication, we could have Requirements (Basic Qualifications), Skills (Desired Skills). Or we could have Qualifications (Desired Skills) and Skills (maybe technical skills). But we need to avoid filler. Let's think: The posting has "Basic Qualifications" and "Desired Skills". So we can map Basic Qualifications to Requirements, Desired Skills to Skills. Then we might not need Qualifications section. Or we could have Qualifications = Desired Skills and Skills = maybe technical skills subset. But better to follow the posting: Requirements = Basic Qualifications, Skills = Desired Skills. We'll omit Qualifications section.
- Benefits: list of benefits.
- Pay: salary range and description.
- Schedule: not present as separate; we can omit.
Now we need to output HTML fragment only, no markdown fences.
We need to use for each section heading. Use - for any list of duties/requirements/benefits. Use
for prose.
We must preserve ALL substantive information; do not invent or summarize away detail. So we need to include all details from the posting, but we can format them as lists or paragraphs.
We must remove boilerplate: cookie/navigation/legal/EEO/equal-opportunity/scam-warning boilerplate, duplicated lines, and application instructions. The posting didn't have obvious boilerplate besides maybe the "At Lockheed Martin, we know mission success starts..." which is part of benefits description; we keep that as it's substantive about benefits. The "Pay Information Full-Time Salary Range: ..." we keep. The "At Lockheed Martin, we know mission success starts..." is part of benefits description; we keep.
We need to remove duplicated lines: there may be duplicate sentences? Not obvious.
We need to ensure we don't include "The information below reflects the standard job description for this position:" as heading; we can incorporate that into Responsibilities paragraph.
Now craft sections:
Section About the role:
About the role
then a containing the introductory paragraph: "Please join us as an ASIC & FPGA Verification Engineer, where you will be working within the central ASIC & FPGA Engineering division for Lockheed Martin Space. You will have the opportunity to support over 50 different programs and research and development (R&D) efforts. Your work will affect technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions."
Section Responsibilities:
Responsibilities
then a maybe combine the "In This Role, You Will ..." sentences and the standard job description paragraph. Could also break into
- for list of duties. The instruction: Use
- for any list of duties/requirements/benefits. So we should convert the duties into a list. Let's extract duties:
From "In This Role, You Will Work with low SWaP, radiation hardened, space rated devices.Devise a unique verification plan for a given design.Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.Develop requirements, test cases, build test benches, generate reports, and document verification results.Work with an independent design team to document and resolve bugs found in the design.Support all aspects of ASIC and FPGA development, to include architecture, design, and analysis.Support technical reviews, and be able to present to internal and external stakeholders."
Also from standard job description: "Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and system simulation. Assignments include the analysis of all aspects from high-level design to synthesis, place and route, and timing and power utilization. Typically uses specialized equipment to establish operation data, conduct experimental tests, and evaluate results."
We can combine into a list of duties. Let's create bullet points:
- Work with low SWaP, radiation hardened, space rated devices.
- Devise a unique verification plan for a given design.
- Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.
- Develop requirements, test cases, build test benches, generate reports, and document verification results.
- Work with an independent design team to document and resolve bugs found in the design.
- Support all aspects of ASIC and FPGA development, including architecture, design, and analysis.
- Support technical reviews and present to internal and external stakeholders.
- Develop, design, verify, and document ASIC and FPGA development.
- Determine architecture design, logic design, and system simulation.
- Analyze all aspects from high-level design to synthesis, place and route, and timing and power utilization.
- Use specialized equipment to establish operation data, conduct experimental tests, and evaluate results.
We need to ensure we don't lose any nuance. Also note that "Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development." is similar to earlier but we keep.
Now Requirements (Basic Qualifications): list:
- Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.
- Experience in the verification of FPGA and/or ASIC devices.
- HDL programming experience with VHDL, Verilog, and/or SystemVerilog.
- Willing and able to obtain and maintain a DoD Secret clearance, thus US Citizenship is required for this position.
We'll put as
- .
Skills (Desired Skills): list all desired skills bullet points:
- Masters or PhD highly preferred.
- Experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).
- FPGA/ASIC design experience is a plus.
- Experienced in scripting such as Perl, TCL, Python.
- Experience developing test cases based off given requirements.
- Experience building test benches for FPGA / ASIC designs to provide randomized stimulus.
- Experience identifying and implementing necessary test exclusions.
- Experience generating coverage reports (code and functional)
- Experience or knowledge of MS Project, JIRA.
- Experience leading projects of multiple engineers, managing schedules, prioritizing work and actively communicating with internal or external stakeholders.
- Knowledge of space-grade/qualified FPGAs and ASICs.
- Experience with Earned Value Management System (EVMS).
- Experience mentoring junior engineers.
- Proficient in AI prompting as it applies to this position and practice.
We need to keep the exact phrasing. Ensure we don't add extra.
Now Benefits: list:
- Medical
- Dental
- Vision
- Flexible work arrangements and schedules (e.g., 4x10)
- 401(k) match
- Paid time off
- Holidays
- Parental Leave
- EAP
- Flexible Spending Accounts
- Education Assistance
- Life Insurance
- Short-Term Disability
- Long-Term Disability
- Annual short-term and/or long-term incentive compensation programs may be offered depending on the position. Payments under these annual programs are not guaranteed and can vary from year to year and are tied to a range of performance metrics.
- For (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays.
for each section heading. Use - for any list of duties/requirements/benefits. Use
for prose.
We must preserve ALL substantive information; do not invent or summarize away detail. So we need to include all details from the posting, but we can format them as lists or paragraphs.
We must remove boilerplate: cookie/navigation/legal/EEO/equal-opportunity/scam-warning boilerplate, duplicated lines, and application instructions. The posting didn't have obvious boilerplate besides maybe the "At Lockheed Martin, we know mission success starts..." which is part of benefits description; we keep that as it's substantive about benefits. The "Pay Information Full-Time Salary Range: ..." we keep. The "At Lockheed Martin, we know mission success starts..." is part of benefits description; we keep.
We need to remove duplicated lines: there may be duplicate sentences? Not obvious.
We need to ensure we don't include "The information below reflects the standard job description for this position:" as heading; we can incorporate that into Responsibilities paragraph.
Now craft sections:
Section About the role:
About the role
then a containing the introductory paragraph: "Please join us as an ASIC & FPGA Verification Engineer, where you will be working within the central ASIC & FPGA Engineering division for Lockheed Martin Space. You will have the opportunity to support over 50 different programs and research and development (R&D) efforts. Your work will affect technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions."
Section Responsibilities:
Responsibilities
then a maybe combine the "In This Role, You Will ..." sentences and the standard job description paragraph. Could also break into
- for list of duties. The instruction: Use
- for any list of duties/requirements/benefits. So we should convert the duties into a list. Let's extract duties:
From "In This Role, You Will Work with low SWaP, radiation hardened, space rated devices.Devise a unique verification plan for a given design.Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.Develop requirements, test cases, build test benches, generate reports, and document verification results.Work with an independent design team to document and resolve bugs found in the design.Support all aspects of ASIC and FPGA development, to include architecture, design, and analysis.Support technical reviews, and be able to present to internal and external stakeholders."
Also from standard job description: "Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and system simulation. Assignments include the analysis of all aspects from high-level design to synthesis, place and route, and timing and power utilization. Typically uses specialized equipment to establish operation data, conduct experimental tests, and evaluate results."
We can combine into a list of duties. Let's create bullet points:
- Work with low SWaP, radiation hardened, space rated devices.
- Devise a unique verification plan for a given design.
- Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.
- Develop requirements, test cases, build test benches, generate reports, and document verification results.
- Work with an independent design team to document and resolve bugs found in the design.
- Support all aspects of ASIC and FPGA development, including architecture, design, and analysis.
- Support technical reviews and present to internal and external stakeholders.
- Develop, design, verify, and document ASIC and FPGA development.
- Determine architecture design, logic design, and system simulation.
- Analyze all aspects from high-level design to synthesis, place and route, and timing and power utilization.
- Use specialized equipment to establish operation data, conduct experimental tests, and evaluate results.
We need to ensure we don't lose any nuance. Also note that "Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development." is similar to earlier but we keep.
Now Requirements (Basic Qualifications): list:
- Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.
- Experience in the verification of FPGA and/or ASIC devices.
- HDL programming experience with VHDL, Verilog, and/or SystemVerilog.
- Willing and able to obtain and maintain a DoD Secret clearance, thus US Citizenship is required for this position.
We'll put as
- .
Skills (Desired Skills): list all desired skills bullet points:
- Masters or PhD highly preferred.
- Experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).
- FPGA/ASIC design experience is a plus.
- Experienced in scripting such as Perl, TCL, Python.
- Experience developing test cases based off given requirements.
- Experience building test benches for FPGA / ASIC designs to provide randomized stimulus.
- Experience identifying and implementing necessary test exclusions.
- Experience generating coverage reports (code and functional)
- Experience or knowledge of MS Project, JIRA.
- Experience leading projects of multiple engineers, managing schedules, prioritizing work and actively communicating with internal or external stakeholders.
- Knowledge of space-grade/qualified FPGAs and ASICs.
- Experience with Earned Value Management System (EVMS).
- Experience mentoring junior engineers.
- Proficient in AI prompting as it applies to this position and practice.
We need to keep the exact phrasing. Ensure we don't add extra.
Now Benefits: list:
- Medical
- Dental
- Vision
- Flexible work arrangements and schedules (e.g., 4x10)
- 401(k) match
- Paid time off
- Holidays
- Parental Leave
- EAP
- Flexible Spending Accounts
- Education Assistance
- Life Insurance
- Short-Term Disability
- Long-Term Disability
- Annual short-term and/or long-term incentive compensation programs may be offered depending on the position. Payments under these annual programs are not guaranteed and can vary from year to year and are tied to a range of performance metrics.
- For (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays.
for prose. We must preserve ALL substantive information; do not invent or summarize away detail. So we need to include all details from the posting, but we can format them as lists or paragraphs. We must remove boilerplate: cookie/navigation/legal/EEO/equal-opportunity/scam-warning boilerplate, duplicated lines, and application instructions. The posting didn't have obvious boilerplate besides maybe the "At Lockheed Martin, we know mission success starts..." which is part of benefits description; we keep that as it's substantive about benefits. The "Pay Information Full-Time Salary Range: ..." we keep. The "At Lockheed Martin, we know mission success starts..." is part of benefits description; we keep. We need to remove duplicated lines: there may be duplicate sentences? Not obvious. We need to ensure we don't include "The information below reflects the standard job description for this position:" as heading; we can incorporate that into Responsibilities paragraph. Now craft sections: Section About the role:
About the role
then acontaining the introductory paragraph: "Please join us as an ASIC & FPGA Verification Engineer, where you will be working within the central ASIC & FPGA Engineering division for Lockheed Martin Space. You will have the opportunity to support over 50 different programs and research and development (R&D) efforts. Your work will affect technology across military space, civil space, commercial space, missiles, missile defense platforms, satellite surveillance platforms, deep space exploration, and manned flight missions." Section Responsibilities:
Responsibilities
then amaybe combine the "In This Role, You Will ..." sentences and the standard job description paragraph. Could also break into
- for list of duties. The instruction: Use
- for any list of duties/requirements/benefits. So we should convert the duties into a list. Let's extract duties:
From "In This Role, You Will Work with low SWaP, radiation hardened, space rated devices.Devise a unique verification plan for a given design.Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.Develop requirements, test cases, build test benches, generate reports, and document verification results.Work with an independent design team to document and resolve bugs found in the design.Support all aspects of ASIC and FPGA development, to include architecture, design, and analysis.Support technical reviews, and be able to present to internal and external stakeholders."
Also from standard job description: "Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and system simulation. Assignments include the analysis of all aspects from high-level design to synthesis, place and route, and timing and power utilization. Typically uses specialized equipment to establish operation data, conduct experimental tests, and evaluate results."
We can combine into a list of duties. Let's create bullet points:
- Work with low SWaP, radiation hardened, space rated devices.
- Devise a unique verification plan for a given design.
- Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.
- Develop requirements, test cases, build test benches, generate reports, and document verification results.
- Work with an independent design team to document and resolve bugs found in the design.
- Support all aspects of ASIC and FPGA development, including architecture, design, and analysis.
- Support technical reviews and present to internal and external stakeholders.
- Develop, design, verify, and document ASIC and FPGA development.
- Determine architecture design, logic design, and system simulation.
- Analyze all aspects from high-level design to synthesis, place and route, and timing and power utilization.
- Use specialized equipment to establish operation data, conduct experimental tests, and evaluate results.
We need to ensure we don't lose any nuance. Also note that "Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development." is similar to earlier but we keep.
Now Requirements (Basic Qualifications): list:
- Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.
- Experience in the verification of FPGA and/or ASIC devices.
- HDL programming experience with VHDL, Verilog, and/or SystemVerilog.
- Willing and able to obtain and maintain a DoD Secret clearance, thus US Citizenship is required for this position.
We'll put as
- . Skills (Desired Skills): list all desired skills bullet points: - Masters or PhD highly preferred. - Experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test). - FPGA/ASIC design experience is a plus. - Experienced in scripting such as Perl, TCL, Python. - Experience developing test cases based off given requirements. - Experience building test benches for FPGA / ASIC designs to provide randomized stimulus. - Experience identifying and implementing necessary test exclusions. - Experience generating coverage reports (code and functional) - Experience or knowledge of MS Project, JIRA. - Experience leading projects of multiple engineers, managing schedules, prioritizing work and actively communicating with internal or external stakeholders. - Knowledge of space-grade/qualified FPGAs and ASICs. - Experience with Earned Value Management System (EVMS). - Experience mentoring junior engineers. - Proficient in AI prompting as it applies to this position and practice. We need to keep the exact phrasing. Ensure we don't add extra. Now Benefits: list: - Medical - Dental - Vision - Flexible work arrangements and schedules (e.g., 4x10) - 401(k) match - Paid time off - Holidays - Parental Leave - EAP - Flexible Spending Accounts - Education Assistance - Life Insurance - Short-Term Disability - Long-Term Disability - Annual short-term and/or long-term incentive compensation programs may be offered depending on the position. Payments under these annual programs are not guaranteed and can vary from year to year and are tied to a range of performance metrics. - For (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays.
- for any list of duties/requirements/benefits. So we should convert the duties into a list. Let's extract duties:
From "In This Role, You Will Work with low SWaP, radiation hardened, space rated devices.Devise a unique verification plan for a given design.Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.Develop requirements, test cases, build test benches, generate reports, and document verification results.Work with an independent design team to document and resolve bugs found in the design.Support all aspects of ASIC and FPGA development, to include architecture, design, and analysis.Support technical reviews, and be able to present to internal and external stakeholders."
Also from standard job description: "Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development. Determines architecture design, logic design, and system simulation. Assignments include the analysis of all aspects from high-level design to synthesis, place and route, and timing and power utilization. Typically uses specialized equipment to establish operation data, conduct experimental tests, and evaluate results."
We can combine into a list of duties. Let's create bullet points:
- Work with low SWaP, radiation hardened, space rated devices.
- Devise a unique verification plan for a given design.
- Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.
- Develop requirements, test cases, build test benches, generate reports, and document verification results.
- Work with an independent design team to document and resolve bugs found in the design.
- Support all aspects of ASIC and FPGA development, including architecture, design, and analysis.
- Support technical reviews and present to internal and external stakeholders.
- Develop, design, verify, and document ASIC and FPGA development.
- Determine architecture design, logic design, and system simulation.
- Analyze all aspects from high-level design to synthesis, place and route, and timing and power utilization.
- Use specialized equipment to establish operation data, conduct experimental tests, and evaluate results.
We need to ensure we don't lose any nuance. Also note that "Develops, designs, verifies, and documents Application-Specific Integrated Circuits (ASIC) and Field Programmable Gate Arrays (FPGA) development." is similar to earlier but we keep.
Now Requirements (Basic Qualifications): list:
- Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.
- Experience in the verification of FPGA and/or ASIC devices.
- HDL programming experience with VHDL, Verilog, and/or SystemVerilog.
- Willing and able to obtain and maintain a DoD Secret clearance, thus US Citizenship is required for this position.
We'll put as