ASIC Design Efficiency Engineer

About the role

NVIDIA is seeking an ASIC Design Efficiency Engineer to join a dynamic team designing hardware accelerators and processors for their next-generation mobile, embedded, and datacenter platforms. This role offers opportunities to innovate and improve performance and efficiency across various product lines including consumer graphics, self-driving cars, and artificial intelligence.

Responsibilities

• Develop innovative hardware, GPU, and system designs to extend the state of the art performance and efficiency.
• Understand the design and implementation, develop methodology and infrastructure to drive PPA (Performance, Power, and Area) improvements.
• Execute and deliver fully verified, high-performance, area and power-efficient RTL (Register Transfer Level) to achieve design targets.
• Collaborate with architects, designers, verification, and VLSI teams to craft the industry's top-performing GPUs.

Requirements

• Bachelor's degree in Electrical Engineering (EE), Computer Engineering (CE), or equivalent experience.
• 2+ years of relevant experience.
• Proficiency in SystemVerilog or similar HDL.
• A strong understanding of logic design and computer architecture.
• Strong interpersonal skills and the ability to work effectively in a diverse, product-oriented team.

Qualifications

• Pipeline processor or deep learning accelerator design/architecture experience.
• Experience with performance verification, low power, or physical (synthesis/VLSI) design.
• Scripting knowledge in Python or Perl.

Benefits

• NVIDIA is widely considered one of the technology world’s most desirable employers.
• The base salary range is $116,000 - $189,750 for Level 2 and $136,000 - $218,500 for Level 3.
• You will be eligible for equity and benefits.

Schedule

Applications for this job will be accepted at least until July 14, 2026.