ASIC Design and Verification Engineer - AI

About the role

The semiconductor industry is rapidly adopting AI for acceleration. Autonomous multi-agent systems that reason, learn, plan, and execute complex EDA tasks are becoming increasingly important. By automating repetitive, multi-step design tasks and optimizing intricate workflows, agentic AI is the future and will enable engineers to focus on higher-level problems. For this purpose, ADI is seeking an ASIC Design and Verification Engineer - AI to spearhead the development and integration of best-in-class AI-driven tools in IC design and verification.

This position is in the Engineering Enablement (EE) group that provides industry-leading tools, methodologies, and support to accelerate product development across the company. You'll be a part of the Systems Verification and Validation (SVV) team within the EE organization in ADI’s Vertical Business Units. SVV is responsible for developing, adopting, and supporting tools, methodologies, and solutions across the entire design verification landscape - including Unified Metric-Driven Verification (MDV), System Verilog (SV)/UVM-based methodologies, Mixed-Signal DV, Post-Silicon Validation Shift-Left, Formal Verification, Functional Safety, Security, Portable Stimulus, and Emulation/Prototyping technologies.

Key Responsibilities

• Evaluate and integrate Agentic AI tools with industry standard and proprietary tools and workflows for massively accelerating various parts of the IC design and verification lifecycle
• Develop libraries of custom instructions, skills, and automation scripts for Agentic AI tools
• Apply machine learning and agentic AI techniques to extend and enhance ADI’s EDA tools
• Connect APIs and SDKs to ADI’s design databases
• Educate users on best practices for using Agentic AI tools, create documentation and deliver training workshops
• Work closely with digital and analog design engineers, verification experts, and tool developers to identify pain points and integrate AI solutions
• Evaluate and benchmark emerging AI/ML tools for semiconductor workflows
• Develop and maintain automation tools to improve verification productivity and debug efficiency
• Keep abreast of the latest in generative AI and agentic frameworks

Required Qualifications

• 5 years of experience in the IC design and verification domain
• Experience with LLM-related techniques: prompt engineering, RAG, vector databases
• Strong experience with scripting languages (Python, Bash)
• Strong experience with System Verilog/UVM and C-based test bench development
• Proficiency with git version control and CI/CD pipelines (GitHub Actions, Jenkins)
• Strong command-line Linux skills and experience with common Linux utilities
• Excellent debugging and analytical skills
• Strong coding and documentation practices
• Excellent communication skills to work across teams

Preferred Qualifications

• Knowledge of AI Infrastructure development, including MCP integration
• API integration experience (REST/GraphQL)
• Familiarity with cloud platforms (AWS, Azure) and CI/CD practices for ML tools
• Experience fine-tuning or training LLMs for domain-specific applications
• Experience with synthesizable RTL development
• Experience with debugging of RTL and gate simulations
• Experience with Xcelium and Synopsys tools
• Proficiency in Formal Verification techniques and tools
• Familiarity with low power verification (UPF)