ASIC Verification Engineer

About the role

NVIDIA is seeking an outstanding ASIC Verification Engineer to verify the design and implementation of the world’s leading SoC’s and GPU’s. This position offers the opportunity to have a real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

Responsibilities

• Define the verification scope, and contribute to the development of the verification infrastructure for memory subsystem units
• Collaborate with architects, designers, software engineers across sites to accomplish your goals

Requirements

• A Bachelor's or Master's Degree in Electrical Engineering, Computer Science, or Computer Engineering or equivalent experience
• 2+ years of relevant work or research experience
• Strong history of working on verification methodology, creating reusable verification components
• Knowledgeable in verification using random stimulus along with functional coverage and assertion-based verification methodologies
• Fluency in Object Oriented Programming with C++ and/or SystemVerilog
• Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB), and methodologies (UVM or equivalent)

Qualifications

• Your work displays a passion for debugging and strong problem solving skills
• Strong communication skills are required

Skills

• Prior verification experience related to high speed IO protocols, or memory coherence is a big plus

Benefits

• Your base salary will be determined based on your location, experience, and the pay of employees in similar positions
• The base salary range is $116,000 - $189,750 for Level 2, and $136,000 - $218,500 for Level 3
• You will also be eligible for equity and benefits

Pay

• Your base salary will be determined based on your location, experience, and the pay of employees in similar positions
• The base salary range is $116,000 - $189,750 for Level 2, and $136,000 - $218,500 for Level 3

Schedule

• Not specified