Architect / R&D Engineer / Senior R&D Engineer

About the role

Real Intent is the leading provider of EDA software for Static Sign-off of digital designs. It provides comprehensive clock-domain crossing sign-off, reset domain crossing sign-off, RTL linting, design-for-test sign-off, and design initialization solutions to eliminate complex failure modes of SoCs.

The company's Ascent and Meridian product families lead the market in performance, capacity, accuracy, and user experience.

Responsibilities

• Works with customers to provide superb technical consultation and maintain strong customer relationships.
• Works with Engineering and Marketing departments to define software improvements, address market opportunities, and resolve customer issues with software tools.
• Primary responsibility for the technical success of software evaluations at prospective customers as well as tool deployment in existing accounts.
• Some travel required.

Qualifications

• BSEE or Computer Engineering or equivalent plus 2-3 years of experience or MSEE or Computer Engineering with 1-2 years of experience in digital design, hardware verification, or applications engineering, with a proven track record for customer satisfaction.
• Detailed working knowledge of Verilog and/or VHDL; SystemVerilog familiarity required, working knowledge a plus.
• Excellent communication and technical presentation skills, both verbal and written.
• A self-starter with a history of driving projects to completion under tight schedules.
• Hands-on, technical in-depth experience in at least two of the following areas:
• Asynchronous clock domain crossing verification on large SoC designs
• Current commercial hardware RTL linting technologies, including detailed knowledge of rule sets
• Hardware static timing analysis (STA) / timing closure flows
• Assertion-based formal property hardware verification
• Testbench-driven hardware simulation flows

Pay

Competitive compensation and benefits.

Schedule

Varies based on position and travel requirements.