Analog Layout Engineer

Role: Design physical silicon layouts for high-speed analog and mixed-signal integrated circuits, including SerDes, ADCs, DACs, and PLLs. Key Responsibilities Create block and chip-level floor plans.Integrate hierarchical blocks and manage layout implementation details.Address parasitic effects, device matching, noise isolation, and shielding.Run and ensure verification for DRC, LVS, and ERC, including antenna rule compliance.Support EM/IR reliability and incorporate ESD protection considerations. Qualifications / Skills Strong expertise in physical IC layout for high-speed analog/mixed-signal designs.Proficiency with hierarchical floor planning and integration of complex blocks.Ability to mitigate parasitics and improve matching, noise performance, and shielding effectiveness.Experience validating designs through standard DRC/LVS/ERC and antenna checks.Knowledge of reliability and protection considerations, including EM/IR and ESD.