Testsite Engineer

About the role

The Testsite Design and Development role is responsible for designing, developing, and utilizing in-house semiconductor test chips and test structures to characterize emerging technologies, generate actionable electrical data, and accelerate technology and customer design enablement.

Responsibilities

• Design and develop in-house test chips, testsites, and test structures to characterize semiconductor technologies and improve understanding of customer design and technology requirements.
• Define and implement chip-level and device-level structures that enable electrical measurement, technology characterization, and development learning.
• Collaborate with technology development, design enablement, product, test, and manufacturing teams to translate characterization needs into testsite requirements and silicon implementations.
• Evaluate and process internal and customer designs through design-to-mask readiness, including layout review and applicable design-rule, verification, and release activities.
• Plan and execute electrical characterization and other relevant testing of fabricated test chips to quantify device, interconnect, circuit, and technology behavior.
• Analyze silicon data, identify trends and performance gaps, and translate results into recommendations for technology, model, design-rule, or testsite optimization.
• Iterate testsite and chip designs based on measured silicon results to improve learning efficiency, measurement capability, and technology maturity.
• Document testsite architecture, design intent, measurement results, and key technical conclusions, and communicate findings to cross-functional stakeholders.
• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.
• Work collaboratively on other projects and assignments as needed.

Requirements

• Education - Bachelor’s degree in Electrical Engineering, Computer Engineering, Applied Physics, Microelectronics, or a related technical field.
• Experience - Relevant experience in semiconductor IC or test-chip design, technology development, device characterization, product engineering, or a related field; minimum years of experience to be aligned with the applicable GF career level and scoping guidelines.

Qualifications

• Master’s degree or PhD in Electrical Engineering, Computer Engineering, Applied Physics, Microelectronics, or a related field.
• Experience designing semiconductor test chips, process-control or characterization structures, or dedicated technology-development testsites.
• Experience with industry-standard EDA environments and data-analysis tools used for IC design, verification, characterization, and silicon debug.
• GF Confidential – Need to know Understanding of CMOS process technology, device physics, parasitic effects, process variation, reliability, and design-technology interaction.
• Experience working across design, process integration, characterization, modeling, PDK, test, or manufacturing organizations.
• Project management skills, including the ability to innovate, execute solutions that matter, and navigate ambiguity.
• Strong written and verbal communication skills.
• Strong planning and organizational skills.

Skills

• Working knowledge of semiconductor devices, integrated-circuit design or layout, electrical characterization, and interpretation of silicon measurement data.
• Experience with semiconductor design and verification flows such as schematic capture, layout, DRC/LVS, extraction, simulation, or design-to-mask release processes.
• Ability to analyze technical data, identify root causes and trends, and translate results into design or technology improvements.
• Fluency in English - written and verbal.

Pay

Expected Salary Range $85,000.00 - $146,000.00 The exact Salary will be determined based on qualifications, experience and location.