Staff Package Design Engineer

About the role

Renesas is a global leader in microcontrollers, analog, power, and SoC products. This role is part of the Advanced Silicon Packaging team, focusing on designing and delivering next-generation, high-performance semiconductor package solutions.

Responsibilities

• Execute package layout design and development for advanced package technologies, including power modules, FCBGA, SiP, WLCSP, and multi-chip modules.
• Develop and maintain package CAD databases, ensuring accuracy and adherence to package design guidelines, DFM, and DFA requirements to support manufacturability, yield, and long-term reliability.
• Manage the package design cycle, including schematic creation, netlist import, footprint assignment, layout implementation, verification, and generation of manufacturing release outputs such as Gerber/drill data, fabrication drawings, assembly drawings, bump maps, and related documentation.
• Create and modify substrate and RDL layouts, bump maps, escape routing, stack-up structures, and power/ground distribution features.
• Collaborate with SI/PI, thermal, reliability, DFT, silicon design, product engineering, and manufacturing teams to support package-level co-optimization and participate in design reviews.
• Ensure package designs comply with applicable foundry, OSAT, substrate vendor, and manufacturing design rules, including DRC, LVS, connectivity, and netlist verification requirements.
• Support Engineering Change Order cycles, design updates, revision control, and release documentation throughout the project lifecycle.

Qualifications

• 4+ years of hands-on experience in package CAD layout, substrate design, or advanced package development; 6+ years preferred.
• Strong background in power module packaging, FCBGA, SiP, WLCSP, advanced substrate-based packages, and multi-die/chiplet-based package architectures.
• High proficiency with industry-standard package design tools such as Cadence Allegro Package Designer / SiP Layout, Siemens Xpedition Substrate Integrator, or equivalent CAD platforms.
• Proven experience applying advanced package design rules, substrate vendor constraints, OSAT assembly requirements, DFM/DFA principles, and manufacturing release standards.
• Experience interfacing directly with Tier-1 OSATs, substrate suppliers, foundries, silicon design teams, and product engineering teams.
• Working understanding of SI/PI fundamentals, high-speed routing, impedance control, power/ground distribution, and crosstalk mitigation.
• Strong communication, presentation, and technical documentation skills, with demonstrated experience working effectively in global, cross-functional engineering environments.

Education

Bachelor's or Master's degree in Electrical Engineering, Microelectronics, Materials Science, or a related technical discipline.