Staff Hardware Systems Validation Engineer

Responsibilities

• Understand chip specifications to take responsibility for chip bring-up, testing, and validation of next-generation Optical Interconnect products.
• Support the development of chip validation plans aligned to product specifications, xVT, and interoperability testing.
• Contribute to test plan development, test bench configuration planning, setup of lab test equipment, and troubleshooting of validation setups to enable successful chip bring-up and testing.
• Work within the product validation team on electro-optic, link-level testing in our lab using industry-standard practices and equipment.

Qualifications

• BS or MS in Electrical Engineering, Physics, or a related field.
• Experience in the data communications field, specifically in electro-optic link-level testing and characterization in a lab environment.
• Familiarity with PCB design, including hardware testing and debugging of electro-optic circuits.
• Ability to work closely with Design Engineers, Software Engineers, and broader cross-functional teams to quickly gain knowledge of Lightmatter products and drive execution of chip bring-up and validation in our lab.
• Hands-on experience with standard bench test equipment for data communications, including electro-optic link testing and characterization.
• Solid understanding of electrical and optical blocks in transmitters and receivers to enable efficient chip bring-up and link testing.
• Ability to troubleshoot and debug the electrical optical building blocks in a transceiver to triage bugs and root-cause performance gaps.

Preferred Qualifications

• PhD is a plus.
• Experience with high-speed data communication systems, including NRZ and PAM4 signaling.
• Familiarity with industry standards such as IEEE, OIF-CEI, or similar for data communication systems.
• Proficiency in Python, MATLAB, or similar tools for scripting and automation.
• Strong documentation skills to develop clear test plans, reports, and technical presentations.
• Prior experience in leading or mentoring junior engineers in lab validation and testing workflows.