Staff Engineer Digital Verification and Methodology

About the role

As a Staff Engineer Digital Verification and Methodology on our Customer Collaboration and Technical Marketing team, you will work hand‑in‑hand with customers, enabling them to transform our products into cutting‑edge designs while building long‑lasting partnerships that thrive on success. Your role: Drive verification excellence and scalable methodologies for complex IP, subsystem and SoC developments. Partner with cross‑functional teams to deliver robust, reusable verification solutions that accelerate quality and time to market.

Responsibilities

• Define verification concepts, strategies and measurable plans for digital IP, subsystems and SoC projects
• Develop and maintain SystemVerilog and UVM verification environments, reusable components and Verification IP
• Create verification specifications, test scenarios, assertions, coverage strategies and closure criteria
• Apply constrained‑random, metric‑driven and formal verification techniques to validate complex designs
• Lead methodology capabilities including roadmap definition, requirements, implementation, documentation, enablement, adoption and continuous improvement
• Evaluate and apply AI‑based methodologies for verification planning, test generation, debug, coverage analysis, knowledge reuse and workflow automation
• Collaborate with concept, design, application engineering and methodology teams to communicate technical direction, status, risks and quality metrics

Qualifications and Skills

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science or a related field, or equivalent practical experience
• Demonstrated experience in digital verification and verification methodology development for complex IP, subsystems or SoCs
• Expert knowledge of SystemVerilog and UVM with a strong understanding of digital design, verification architectures and constrained‑random techniques
• Proven ability to develop verification environments and reusable assets including specifications, assertions, coverage strategies and Verification IP
• Strong analytical and debugging skills with the ability to provide technical direction and collaborate across global cross‑functional teams; English: written and spoken
• Preferred: Experience with formal and assertion‑based verification, firmware‑driven verification, microcontroller‑based ICs or automotive, safety or security requirements
• Nice‑to‑have: Familiarity with regression automation and verification infrastructure, mentoring or methodology adoption leadership, or applying AI‑based engineering approaches

Pay

Location: Lexington, KY, United States. Indicative salary range: US$98,560 – US$147,840. All employees are eligible to participate in an incentive plan.