Staff Engineer, Design Verification
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
About the role
Marvell's CXL Product Development team works on groundbreaking innovations for the composable datacenter. We are looking for individuals with a deep understanding and passion for ASIC verification to craft creative solutions for DV architecture, verification, and post-silicon validation on some of the industry's most complex semiconductor chips. As a member of a dynamic ASIC development team, you will lead verification architecture, execution, delivery, post-silicon validation, and emulation of next-generation ASICs under development, working closely with cross-functional teams. You will also have the opportunity to leverage your experience to drive the ASIC front-end development process, emulation, post-silicon validation (PSV), tools, and methodologies, leading to successful ASIC products.
Responsibilities
- Lead verification architecture, execution, and delivery of next-generation ASICs.
- Drive post-silicon validation and emulation efforts.
- Collaborate with cross-functional teams to ensure successful ASIC development.
- Influence and improve ASIC front-end development processes, tools, and methodologies.
- Bring up multiple ASICs in the lab.
- Lead ASIC development teams and drive adoption of new methodologies.
Requirements
- Bachelor’s degree in Computer Science, Electrical Engineering, or related fields with 3+ years of professional experience.
- Master’s degree and/or PhD in Computer Engineering, Electrical Engineering, or related fields with 2+ years of experience (preferred).
- Strong understanding of ASIC development process, tools, and verification methodologies.
- Demonstrated track record of leading verification and delivering high-quality ASICs.
- Hands-on experience in verification of multiple SoC architectures, processor cores, memory subsystems, and peripheral interfaces.
- Hands-on experience in driving emulation efforts leading to successful tapeout.
- Proven ability to lead ASIC development teams.
- Excellent communication, interpersonal, and presentation skills.
- Strong cross-functional leadership skills.
- Highly motivated, self-driven, and able to drive adoption of new methodologies.
Pay
Expected base pay range: $115,200 – $170,390 per annum. The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location, and market conditions.
Benefits
Marvell is committed to providing exceptional, comprehensive benefits that support employees at every stage—from internship to retirement and through life’s most important moments. Offerings include:
- Employee stock purchase plan with a 2-year look back.
- Family support programs to help balance work and home life.
- Robust mental health resources to prioritize emotional well-being.
- Recognition and service awards to celebrate contributions and milestones.