Staff Deep Learning Compiler Engineer
About the role
Quadric is redefining edge AI with the industry's first General Purpose Neural Processing Unit (GPNPU), enabling developers to run both neural network inference and conventional C++ code on a single programmable architecture. Founded in 2016 and based in downtown Burlingame, California, Quadric is building the world's first supercomputer designed for the real-time needs of edge devices. As a Deep Learning Compiler Engineer, you will design and optimize the compiler stack (MLIR, TVM, LLVM) that bridges state-of-the-art neural network frameworks directly to our proprietary hardware architecture, unlocking peak hardware performance, low latency, and memory efficiency for edge AI workloads.
Responsibilities
- Design, implement, and maintain compiler optimization passes targeting Quadric’s processor architecture using frameworks like MLIR, Apache TVM, or LLVM.
- Develop lowering pathways from high-level machine learning frameworks (PyTorch, TensorFlow, ONNX) down to optimized low-level kernel code.
- Optimize neural network performance for memory throughput, latency, compute unit utilization, and power consumption.
- Implement graph-level optimizations, including operator fusion, layout transformation, quantization (INT8/FP16), and memory allocation strategies.
- Analyze novel deep learning model topologies (Transformers, CNNs, Vision-Language Models) and extend compiler support for new operators and primitives.
- Benchmark and profile end-to-end model performance to identify and resolve compiler bottlenecks.
- Collaborate closely with hardware and micro-architecture teams to define instruction set extensions, hardware acceleration features, and compiler requirements.
- Develop software simulators, functional models, and test benches to validate compiler correctness and generated binary performance.
- Participate in hardware bring-up and validation efforts on FPGA and ASIC platforms.
Requirements
- BS, MS, or Ph.D. in Computer Science, Computer Engineering, Electrical Engineering, or a related field.
- 8+ years hands-on experience developing deep learning compilers or compiler infrastructures (e.g., MLIR, Apache TVM, LLVM, XLA, TensorRT, or Glow).
- Strong proficiency in C++ (14/17/20) and Python, with solid fundamentals in data structures, algorithms, and object-oriented design.
- Familiarity with modern AI/ML frameworks (PyTorch, TensorFlow, ONNX) and deep learning operator representations.
- Solid understanding of computer systems, memory hierarchies, parallel processing, and CPU/GPU/NPU instruction execution.
Qualifications
- Experience with low-level kernel optimization, SIMD/vector programming, and memory allocation strategy development.
- Knowledge of model quantization methodologies (INT8, FP8, mixed-precision) and post-training/QAT optimization techniques.
- Prior experience working on software stacks for custom AI accelerators, DSPs, or embedded architectures.
- Experience with FPGA bring-up, hardware emulation, or cycle-accurate simulator development.
Skills
Technical skills emphasized include MLIR, TVM, LLVM, C++, Python, PyTorch, TensorFlow, ONNX, compiler optimization, graph transformations, quantization, hardware‑software co‑design, FPGA/ASIC validation.
Benefits
- Medical, dental, and vision insurance from day one – premiums covered at 99% for employees.
- Company‑paid life insurance.
- Voluntary supplemental life insurance.
- STD + LTD insurance.
- Commuter support including parking or Caltrain reimbursement.
- FSA + HSA.
- Equity with the business.
- Paid parental leave.
- 401(k) retirement plan.
- Flexible PTO.
- Winter holiday shutdown.
- Catered lunch each day in the office.
- Downtown Burlingame office location, close to shops, cafes, and local amenities.
- Collaborative, low‑ego culture with significant ownership and impact.
- Work culture focused on innovative disruption.
Pay
The base salary range for this position is $170,000 to $230,000. The actual base salary offered will depend on factors such as role level, years and depth of relevant experience, technical skills, role criticality, internal equity, and work location. In addition to base salary, the role is eligible for equity and a discretionary annual