Staff Applications Engineer, HAV Solutions

About the role

Synopsys is a leader in engineering solutions from silicon to systems, delivering industry‑leading silicon design, IP, simulation and analysis, and design services. You will join the Hardware‑Assisted Verification (HAV) Applications Engineering team, supporting customers deploying HAPS and ProtoCompiler on real SoC designs across AI, automotive, networking, and mobile markets, collaborating with applications engineers, R&D, Product Management, and Sales to drive customer success.

Responsibilities

• Support customer deployments of HAPS and ProtoCompiler, working through the ASIC‑to‑FPGA flow including partitioning, synthesis, place‑and‑route, timing closure, and hardware bring‑up
• Debug customer designs involving interface IP such as DDR4/DDR5, LPDDR, PCIe, Ethernet, USB, AXI, and other standard protocols
• Reproduce and analyze technical issues reported by customers, working with R&D to identify root causes and deliver solutions or workarounds
• Develop and document methodologies for partitioning strategies, clock architecture, debug instrumentation, and bring‑up procedures
• Collaborate with Sales and Customer Success teams to support technical evaluations, proof‑of‑concept engagements, and deployment planning
• Use Verdi, ProtoCompiler runtime debug tools, and protocol analyzers to troubleshoot RTL, netlist, timing, and hardware issues

Requirements

• Bachelor's or Master's in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience
• 5‑8 years in FPGA implementation, ASIC design, ASIC verification, FPGA prototyping, or applications engineering
• Solid experience with FPGA synthesis, place‑and‑route, and timing closure using Xilinx Vivado, Intel Quartus, or similar tools
• Working knowledge of SystemVerilog, RTL design, and verification concepts
• Hands‑on experience with at least one interface IP family such as PCIe, DDR, Ethernet, USB, or AXI
• Scripting ability in Tcl, Python, or shell for automation and flow customization
• Experience with Synopsys HAPS, ProtoCompiler, or other FPGA‑based prototyping platforms is a strong plus

Skills

• Ability to examine partitioning results and anticipate downstream issues
• Skillful questioning to isolate RTL, tool, constraint, or hardware problems
• Comfort working with incomplete information and determining what is needed to move forward
• Aptitude to explain technical problems clearly to customer engineers
• Methodical troubleshooting using logs, waveforms, timing reports, and other available data
• Quick learner, unafraid to explore unfamiliar design or toolflow areas

Benefits

Synopsys offers a comprehensive range of health, wellness, and financial benefits, including both monetary and non‑monetary offerings. Details on salary range and specific benefits will be provided by your recruiter during the hiring process.