Staff Analog Mixed-Signal Design - Optical

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. As part of the Broadband Analog group, you’ll design physical layer ICs for high-speed optical fiber data communication, including Transimpedance Amplifiers (TIAs) and drivers for Silicon Photonic (SiPho), Electro-absorption Modulators (EAMs), and Mach-Zehnder Interferometer Modulators (MZMs). This team leads the market in TIAs and drivers for Data Center and Telecom applications, addressing bandwidth, capacity, and power challenges in cloud computing and mega data center networks.

About the role

Marvell is seeking an RF and Analog Design Engineer to contribute to the development of multi-tens of GHz transimpedance amplifiers (TIAs). These optical interface chips are tightly coupled with high-performance equalizers, delivering best-in-class performance for coherent long-haul, metro, and PAM4 data center systems.

Responsibilities

• Design leading-edge transimpedance amplifiers using SiGe BiCMOS and advanced CMOS FinFET technologies, pushing circuit performance beyond current industry standards.
• Develop transmission line structures and other millimeter-wave components to achieve higher performance than conventional approaches.
• Design high-performance broadband analog circuits for optical front-end receivers.
• Create various analog circuits, including linear regulators, AGC loops, current/voltage sensors, and bandgaps.
• Collaborate with cross-functional teams to support post-silicon validation, qualification, transition to mass production, and customer support.

Requirements

• Bachelor’s degree in Electrical Engineering with 3-5 years of industry experience OR Master’s or PhD in Electrical Engineering with 1+ years of industry experience in high-performance RF/Analog Receiver/TIA design.
• Proven experience in high-performance receiver design, including both chip tape-out and lab evaluation.
• Proficiency in EDA CAD tools and analog custom layout.
• Hands-on experience measuring IC performance and debugging designs to correlate simulations with measurements.
• Deep understanding of fundamentals, including:
  • Detailed transistor-level design.
  • Device physics.
  • Control/feedback loop stability analysis.

Preferred Qualifications

• Direct project experience in at least one of the following:
  • Automatic gain-control loops.
  • High-precision analog circuits (linear regulators, current sensors, bandgaps, DAC/ADC).
  • Continuous-time linear equalizers.
• Experience with package-system integration issues.
• Project experience across multiple technologies (SiGe BiCMOS and FinFET CMOS are pluses).
• Experience overseeing and mentoring junior circuit designers.
• Experience as a chip lead with successful silicon delivery.
• Experience taking chips to mass production.
• Ability to translate chip-level specifications into architecture.
• Strong communication, presentation, and documentation skills.

Pay

Expected base pay range: $126,700 – $187,480 per annum. The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location, and market conditions.

Benefits

• Employee stock purchase plan with a 2-year look-back.
• Family support programs to help balance work and home life.
• Robust mental health resources to prioritize emotional well-being.
• Recognition and service awards to celebrate contributions and milestones.