Sr. Staff Engineer, Photonics Design

Job Summary

Sr. Staff Engineer, Photonics Design at Ayar Labs is responsible for defining and driving the photonic device layer of the company's co-packaged optics solution. The role involves owning the device roadmap, engaging with the Taiwan semiconductor ecosystem, and shaping the design and analysis infrastructure.

Required Qualifications

• B.S. or equivalent experience in Electrical Engineering, Optical Engineering, or related field with 6+ years of commercial experience in silicon photonics or integrated photonic device design
• Deep understanding of photonic device physics including electro-optic modulators, photodetectors, gratings, couplers, micro-ring resonators
• Proficiency with simulation and design tools for passive and active optical devices (e.g., FDTD, charge transport simulation)
• Strong Python skills; demonstrated experience writing well-structured code and extending a shared codebase as part of a team
• Track record of taking opto-electronic components from design through manufacturing: design, debug, and validation
• Track record of solving problems that don't have obvious solutions — in device physics, process integration, or system-level tradeoffs

Preferred Qualifications

• M.S. or PhD with integrated photonics focus
• Experience engaging directly with foundry process teams on process development or customization beyond standard PDK offerings
• High-speed design and RF test experience: VNA, BERT, wafer-level screening
• Statistical analysis of process and test data; DOE methods
• Familiarity with co-packaged optics: system requirements, CPO architectures, and the industry transition from pluggable to on-board optics
• Demonstrated use of AI tools to achieve meaningful productivity gains in design or analysis workflows — e.g., device optimization, AI-assisted code development

What You'll Own

• Device roadmap: set performance targets, assess process feasibility, and drive development from simulation through production
• Foundry partnership: engage directly with the Taiwan semiconductor ecosystem to push process capability in service of product requirements
• Design infrastructure: architect and extend the team's design and analysis tools: simulation automation, layout flows, verification frameworks, and custom code the broader team depends on
• Debug and yield: lead device-level debug, failure analysis, and yield investigation across development and production runs
• Cross-functional co-design: drive component performance in close collaboration with system, laser, packaging, firmware, and circuit design teams

Salary Range

$180,000 - $240,000