Sr. Staff AI Engineer, Silicon Design

About the Role

We are seeking a versatile Sr. Staff AI Engineer to drive the integration of Artificial Intelligence into the semiconductor design lifecycle. In this role, you will bridge the gap between advanced ML research and production-grade hardware engineering, developing specialized foundational language models and cognitive orchestration systems that optimize everything from RTL generation to physical verification.

Responsibilities

• Design and deploy production-scale generative workflows and context-augmented retrieval mechanisms to automate complex EDA tasks, including IP configuration and RTL generation.
• Architect and fine-tune foundation models (LLMs/SLMs) and other deep learning architectures to enhance the silicon design process.
• Implement Reinforcement Learning (RL) environments and policy-gradient methods to guide non-linear optimization routines across automated cell-sizing and routing passes.
• Collaborate with R&D and IP teams to embed AI-driven assistants directly into existing digital and analog design flows.
• Build robust, cloud-native training pipelines using Kubernetes and Docker to handle large-scale EDA datasets.
• Lead the transition of AI prototypes into reliable tools, ensuring high performance, maintainability, and scalability for thousands of internal users.

Requirements

• M.S. or higher in Electrical Engineering, Computer Science, or a related field with a focus on AI/ML or VLSI.
• 7+ years of experience in the semiconductor or EDA industry, with a proven track record of deploying AI/ML models in a production capacity.
• Hands-on experience across the full silicon lifecycle (RTL-to-GDS), with specific exposure to Physical Design, Place-and-Route, and Physical Verification (DRC/LVS).
• Strong programming skills in Python, C++, and SystemVerilog, along with experience in scripting (Tcl, Shell).
• Proficiency in PyTorch or TensorFlow, and experience with state-of-the-art framework orchestration, custom inference optimization tools, and model evaluation harnesses.

Preferred Qualifications & Skills

• Ph.D. with research specifically focused on AI/ML for EDA and metric modeling.
• Extensive experience with advanced technology nodes (7nm, 5nm, 3nm, or below) and physical verification toolsets (e.g., IC Validator, Calibre).
• Demonstrated experience in Multi-objective Optimization, Transfer Learning, and the application of machine learning architectures to hardware problems.
• Deep expertise in operationalizing GenAI platforms on distributed, multi-GPU cloud environments.
• Background in optimizing algorithms for FPGA or SoC deployment and hardware-efficient ML implementation.