Sr. Principle Design Engineer

About the role

This person will work with the existing functional verification environment to add new features into the verification environment, ensuring various customer configurations are clean as part of verification regressions, supporting customers in case of any issues with using the verification environment, and functional and code coverage.

Responsibilities

• Add new features into the verification environment
• Ensure various customer configurations are clean as part of verification regressions
• Support customers in case of any issues with using the verification environment
• Ensure the design is in line with the technical and quality requirements set for the team – particularly with respect to our quality Metrics

Requirements

• BS/MS - Electrical / Computer Engineering
• At least 10-12 years of relevant experience including design verification experience
• Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must
• UVM based functional verification environment development is required
• DDR, LPDDR, AXI and/or CHI-E experience is highly desirable
• Memory controller verification experience