Sr Principal Design Engineer

About the role

This is an opportunity to join a dynamic team of experienced engineers developing physical IP for industry-standard high-speed serial-links.

Responsibilities

• Contribute to all mixed-signal design, verification, and testing aspects including circuit design and development from a high-level architectural specification, post-silicon test plan development and execution, and collaboration with the digital team to achieve functional and performance closure.
• Thorough understanding of mixed-signal circuit design fundamentals, mixed-signal circuit design and verification flows, Cadence analog design environment, basic signal processing concepts.
• Familiarity with serial link design techniques, data converter (ADCs and/or DACs) and/or clock synthesis and recovery (PLLs, DLLs, CDRs) techniques, MATLAB or C for architecture development, hardware description languages such as SystemVerilog or Verilog for functional model development, scripting languages such as Perl or Python for automation, silicon validation testing knowledge and experience.

Requirements

• Excellent verbal and written communication skills.
• Ph.D. EE degree with 5+ years or MS EE degree with 7+ years of mixed signal design industry experience in advanced process technologies.

Qualifications

• Thorough understanding of mixed-signal circuit design fundamentals, mixed-signal circuit design and verification flows, Cadence analog design environment, basic signal processing concepts.
• Familiarity with serial link design techniques, data converter (ADCs and/or DACs) and/or clock synthesis and recovery (PLLs, DLLs, CDRs) techniques, MATLAB or C for architecture development, hardware description languages such as SystemVerilog or Verilog for functional model development, scripting languages such as Perl or Python for automation, silicon validation testing knowledge and experience.

Skills

• Excellent verbal and written communication skills.
• Ph.D. EE degree with 5+ years or MS EE degree with 7+ years of mixed signal design industry experience in advanced process technologies.

Benefits

• Paid vacation and paid holidays.
• 401(k) plan with employer match.
• Employee stock purchase plan.
• A variety of medical, dental and vision plan options.

Pay

• The annual salary range for California is $154,000 to $286,000.

Schedule

• You may also be eligible to receive incentive compensation: bonus, equity, and benefits.