Sr. Manager ASIC, Annapurna Labs - Cloud Scale Machine Learning Acceleration Team

About the role

Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago—even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.

Responsibilities

• Lead and grow a team of SOC integration engineers responsible for critical deliverables in our ML accelerator chips
• Drive technical decisions across multiple disciplines (RTL, timing, DFT, physical design)
• Ensure on-time delivery of complex SOC integration milestones
• Establish and maintain best practices for top-level integration, including clock/reset architecture, CDC methodology, and quality metrics
• Interface with various stakeholders including architecture, verification, and physical design teams

Requirements

• Proven track record leading SOC integration teams through successful tape-outs
• Excel at cross-functional leadership and can drive complex technical decisions across multiple teams
• Passionate about developing engineers and implementing robust integration methodologies
• Deep expertise in high-performance SOC design, including clock/reset architecture, timing closure, and CDC methodology
• Data-driven and can effectively balance technical excellence with project execution

Qualifications

• 10+ years of equivalent experience
• 3+ years of people management experience
• Experience leading and interacting with cross-functional teams
• Deep technical expertise in SOC integration and methodology
• Track record of successful tape-outs in leading edge nodes

Skills

• Master's degree in electrical engineering, computer engineering, or equivalent
• Experience with ML accelerator or high-performance compute SOC development
• Track record of implementing and scaling SOC integration methodologies
• Strong background in power/performance optimization and physical design considerations
• Experience with modern SOC development tools and flows

Benefits

• Work/Life Balance
• Inclusive Team Culture
• Mentorship & Career Growth

Pay

$239,600.00 - $324,100.00 USD annually

Schedule

Full-time