Sr. Engineer, Silicon Validation

About the role

Ayar Labs is seeking a Sr Engineer: Silicon Validation to join our team in San Jose. This role involves owning the silicon bring up and validation of our optical chiplets, performing post-silicon bringup and characterization, developing test infrastructure and automation, investigating silicon anomalies, and collaborating with cross-functional teams.

Responsibilities

• Perform initial power-on and bringup of new silicon tape-outs, including boot sequence validation, clock/power domain verification, and initial functionality tests.
• Functional and electrical characterization of high-speed SerDes interfaces, photonic control blocks, and mixed signal blocks.
• Define and execute test plans at both block and chip level.
• Use lab test equipment (BERT, oscilloscope/DCA, OSA, signal generators) to characterize signal integrity, eye diagrams, BER, jitter, and optical performance metrics.
• Develop and maintain Python-based test scripts and automation frameworks for regression and characterization testing.
• Systematically investigate silicon anomalies and failures; collaborate with design and firmware engineers to develop and verify fixes.
• Write clear test plans, validation reports, and signoff documentation; communicate findings to cross-functional teams.
• Partner with firmware, analog/mixed-signal, digital, and systems engineering teams across the full product development cycle.

Requirements

• Bachelor's degree in Electrical Engineering or related field with 3+ years of relevant industry experience.
• Hands-on experience with post-silicon bringup and validation of high-speed SoC or mixed-signal devices.
• Working knowledge of SerDes PHY operation and characterization, including NRZ and/or PAM-4 signaling.
• Proficiency with lab equipment used for high-speed characterization: BERT, oscilloscopes, signal analyzers.
• Proficiency in Python for test scripting and data analysis.
• Strong troubleshooting skills and ability to work independently in a lab environment.
• Proficiency with version control (Git) and software development environments.

Qualifications

• Experience with photonic device or electro-optic system characterization and validation.
• Familiarity with optical measurement equipment (OSA, optical power meters, lasers).
• Experience with high-speed serial standards: Ethernet (100G+), PCIe, OIF CEI.
• Experience with board-level debug and hardware bring-up using JTAG or I2C/SPI interfaces.

Benefits

Salary range: $150,000 - $193,000

Pay

$150,000 - $193,000

Schedule

Full-time

Skills

Post-silicon bringup and validation, high-speed SerDes PHY operation, lab equipment usage, Python scripting, troubleshooting, version control, high-speed serial standards, board-level debug, JTAG/I2C/SPI interfaces.

Benefits

Not specified