SoC Architect
AMD · Austin, TX · 4 days ago
HybridEngineeringFull-time
Key Responsibilities
- Lead SoC architecture: define processor complex, interconnect/NoC, memory controllers/DRAM topology, IOMMU hierarchy, security islands, and subsystem boundaries; write clear architecture specifications and drive reviews to closure.
- Own platform power & reset intent: specify PWROK/PWROKRAW/reset/iso sequencing across rails and domains; ensure asynchronous PWROK de-assertion behavior meets EGADS and safety requirements; partner with board/VR teams and FCH/ART owners.
- SOC Features ownership: Define and drive SOC features
- Static timing analysis definitions: work with IP, process and product teams to define STA strategies
- High-speed I/O architecture: architect PCIe Gen5/Gen6 RC/EP topologies, NTB links, Ethernet MAC/PHY integration, clocking, lane bifurcation, and PHY interfaces; align controller programming models with NBIO/SYSHUB wrappers.
- Performance, power, and reliability modeling: establish CAC targets for GFX/NPU, guard-bands/aging models using ARO/RO monitors, and close V/F/tj operating points with mission profiles; collaborate with quality teams on long-life reliability.
- Functional safety (FuSa) & RAS: work with IP teams to allocate FuSa and RAS requirements, trace to Jama/PRS, and align external auditors and customer expectations; ensure ISO-26262 compliance plans are executable.
- Cross-functional leadership: partner with program management and customer engineers on headline specs (CPU/GPU/NoC sizing, DRAM speed/width, PCIe/Ethernet/NTB), schedules, and deliverables; clarify AMD vs. customer roles and responsibilities.
- Documentation & reviews: maintain MAS/mPRS/PRS artifacts, reset/power specs, and architectural confluence pages; drive HLD concept exits and LS[ABCD] milestones.
Preferred Experience
- X86, GPU, interconnect, HSIO, Memory subsystems architecture
- RAS, Performance and Power bounding box definitions
- Familiarity with BIOS/FW/SW/Systems
- Embedded markets (automotive/networking/industrial)
- SOCDesign and execution
Benefits
AMD benefits at a glance.