SLT Engineer

About DeepX

DEEPX is a forward-thinking Series D startup architecting the infrastructure for the Physical AI era. By delivering the world’s most energy-efficient NPU technology, we solve the critical power and heat challenges of Generative AI to bring super-intelligence to every device, everywhere. Our global leadership is validated by record-breaking recognition as a multi-year CES Innovation Award honoree (2024 & 2026) and being named the 2024 Frost & Sullivan Company of the Year in the NPU sector. With an enterprise value approaching 1 trillion KRW, DEEPX offers a unique pre-IPO opportunity to join a market leader defining the new industry standard for the $70B AI semiconductor market.

We are currently scaling toward mass production of our flagship DX-M1 (Samsung 5nm) with over 50 global projects scheduled, while engineering next-generation 2nm solutions to support 100B parameter Large Language Models (LLM) at the edge.

Responsibilities

• SLT HW/SW Test System Setup & Operation: Establish and operate HW infrastructure (e.g., SLT boards, sockets) and develop/maintain test SW & scripts (firmware, drivers, test scenarios) for mass production testing of AI semiconductors.
• Mass Production Test Scenario & Program Development: Develop SLT test protocols, workload execution programs, and automated test sequences simulating actual HW and customer-use environments (Mission Mode).
• Mass Production Yield Management & HW/SW Debugging: Set up SLT in OSATs and production lines; improve yields through Failure Analysis (FA) and cross-debugging across HW (SI/PI, Power, Thermal) and SW (OS, drivers, FW).
• Reliability & Performance Verification: Validate HW/SW interaction under environmental testing (HTOL, ESD, etc.) and real-world workload conditions.
• Collaboration & Vendor Management: Drive technical discussions with OSATs, board/socket vendors, and internal SW engineering teams, while managing documentation for mass production transfer.

Requirements

• Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, Instrumentation/Control Engineering, or a related field.
• Minimum 3+ years of experience in SLT system setup, ATE development, or embedded system (HW+SW) verification/mass production.
• HW Skills: Understanding of schematics and PCB artworks, board-level debugging using measurement equipment, and solid grasp of HW interfaces (PCIe, LPDDR, etc.).
• SW Skills: Proficiency in writing and modifying embedded SW, drivers, or test scripts in C/C++, Python, and Linux environments.
• Ability to travel internationally (e.g., OSAT visits) and demonstrate strong, flexible communication skills with external vendors and internal teams.

Preferred Qualifications

• Hands-on experience with mass production SLT for AI semiconductors, SoCs, or PCIe-based systems.
• Experience in Linux kernel, bootloader, driver development, and debugging.
• Experience in high-speed interface (PCIe, LPDDR, etc.) SI/PI analysis and reliability evaluation.
• Experience in OSAT and semiconductor back-end assembly/test production line automation and infrastructure setup.
• Exceptional Root Cause Analysis (RCA) capability for complex issues occurring at the HW/SW boundary.

Benefits

• Stock options equivalent to annual salary for all full-time employees.
• Latest equipment and premium work environment (latest laptops, height-adjustable standing desks, monitor arms, dual monitors, etc.).
• Lunch support + breakfast and dinner provided.
• Unlimited snacks, ice cream, and beverages in the company café.
• Fitness cost support including sauna access.
• Annual comprehensive health check-up (including spouse).
• Celebration allowances for birthdays, anniversaries, and Christmas Eve (with early leave).
• Holiday bonuses for Seollal and Chuseok.
• Paid leave and financial support for family events (congratulations and condolences).

Schedule

Monday to Friday, 9:00 AM – 6:00 PM (Lunch break: 12:00 PM – 1:00 PM).

Full-time role with a 3-month probationary period (100% compensation).