SLD Avionics FPGA Engineer III - Lunar Permanence

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. This role is part of the Lunar Permanence business unit, which develops Blue Origin’s Blue Moon landers and related products. We are building sustainable infrastructure for our transport of crew and cargo from Earth to the lunar surface.

About the role

As part of a hardworking team of systems engineers, hardware engineers, software engineers, and program leaders, you will play a critical role in the development, implementation, verification, and testing of HDL for our FPGA-based designs. These designs must operate in harsh environments under demanding conditions onboard our Avionics components in various spaceflight systems. You will:

• Develop HDL requirements in coordination with systems engineering, hardware engineering, software engineering, and subsystem owners.
• Develop FPGA design and verification utilizing hardware description languages.
• Be responsible for the development of tests and the associated documentation.
• Participate in design reviews.
• Work directly with NASA and our National Team Partners as part of the Human Landing System (HLS) Sustaining Lunar Development (SLD) program.
• Play a key role in developing the Lunar Transportation system that will return humans to the Moon and extend human presence permanently beyond Earth.

We are looking for someone to apply their technical expertise, leadership skills, and commitment to quality to positively impact safe human spaceflight. Passion for our mission and vision is required!

Requirements

• Bachelor’s/Master’s degree in computer engineering, electrical engineering, computer science, mathematics, physics, aerospace, or related fields.
• 5+ years of FPGA/ASIC design and verification work experience.
• Proficient in writing RTL using Verilog/SystemVerilog/VHDL (SystemVerilog desired).
• Strong understanding of FPGA design concepts, CDC, constraint definition, STA, and timing closure.
• Proficient with FPGA development tools such as Xilinx Vivado, Intel Quartus, Lattice Diamond/Radiant, or Microchip Libero.
• Proficient with ModelSim/QuestaSim or equivalent simulators.
• Proficient in writing testbenches utilizing techniques such as UVM/OVM, SV Assertion, and/or functional/code coverage analysis.
• Experience debugging failures in simulation to root cause problems.
• 10% travel to other Blue Origin locations for various meetings or large-scale company events.
• Ability to work effectively in a team environment and to communicate technical information clearly and concisely.
• Must be a U.S. citizen or national, U.S. permanent resident (current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Preferred Qualifications

• 8+ years of FPGA/ASIC development experience.
• Proficient with scripting languages like Perl, Python, or Tcl.
• Proficient with revision control systems, such as Git/SVN.
• Experience with common on-chip bus protocols such as AMBA (AXI, AHB, APB).
• Experience with IEEE 802.3, XAUI, JESD204, I2C, SPI interfaces.
• Working knowledge of NPR 7150.2, DO-254, or other safety-critical software standards.

Pay

Base pay range for CO applicants is $119,814.00 - $167,738.55. WA applicants is $130,706.00 - $182,987.70. Other site ranges may differ.

Benefits

• Medical, dental, vision, basic and supplemental life insurance.
• Paid parental leave, short and long-term disability.
• 401(k) with a company match of up to 5%.
• Education Support Program.
• Stock options for all regular employees (working at least 20 hours/week).
• Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays.
• Dependent on role type and job level, employees may be eligible for additional benefits and bonuses based on individual contributions and company results.