Senior Wafer & FPA Process Engineer

About the role

Safran Defense & Space Inc., a leading U.S. aerospace company, is seeking a Senior Wafer & FPA Process Engineer to join Attollo Engineering. This role is based in Camarillo, CA.

Responsibilities

• Develop and optimize wafer-level and FPA-level fabrication processes for infrared detectors and other optoelectronic devices
• Develop semiconductor wafer processes for III-V materials (InP, GaAs, InGaAs, GaSb), including photolithography, wet/dry etch, metal and dielectric deposition, and surface preparation/passivation
• Develop and sustain FPA-level processes, including indium bump deposition, underfill, and substrate thinning/removal
• Develop back-end processes including wafer dicing, die-level cleaning, and FPA inspection and screening
• Perform failure analysis and root-cause investigations on wafer- and FPA-level yield issues and implement corrective actions
• Create process Travelers and Work Instructions with clear instructions
• Track processes and make notes via process travelers
• Run designed experiments to improve process reproducibility and increase yield
• Participate in device test data reviews and suggest process improvements to improve device performance
• Provide engineering and operator oversight
• Mentor and train operators, technicians, and junior engineers in process execution and cleanroom best practices
• Ensure safe handling of process chemicals and compliance with cleanroom protocols and EHS requirements
• Perform other duties as assigned

Requirements

• B.S. in Electrical Engineering, Materials Science, Physics, Chemical Engineering, or a related field; M.S. or Ph.D. preferred
• Experience with the operation of nanofabrication equipment including Photolithographic stepper, metal deposition, wet/dry etching, SEM, and plasma deposition machines
• 7-10+ years of experience in microelectronic semiconductor fabrication and wafer handling techniques
• Candidate should possess a proven track record of developing solutions to process development problems
• Experience with Design of Experiments and Statistical Process Control
• Ability to understand and analyze data related to semiconductor device performance
• Ability to convey data analysis in an accurate and concise format and developing and delivering presentations
• Experience with creating reports, documenting tests, and creating and reviewing process work instructions

Qualifications

• Requires U.S. Citizenship or Permanent Resident Status required.

Benefits

• Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions of the role.
• EOE/AA/M/F/Vets – US Protected Individual status required (US citizen, lawful permanent resident, asylee, refugee or temporary resident (as defined at 8 USC 1160(a).

Pay

$135,000 - $185,000 annual salary, plus participation in individual performance bonus plan.

Schedule

Little travel is expected for this position, although some out-of-area and overnight travel may be required.