Senior Technical Staff Engineer – IC Analog Design

Job Description

We are seeking a highly experienced, skilled, and hands-on IC Analog Design Engineer to lead development of key analog and mixed signal blocks for our next generation edge computing SoCs. This position requires a strong background in CMOS design from initial system architecture to post-silicon lab bench analysis. Leadership responsibilities include participation in a cross-functional team to actively drive silicon quality throughout the product development cycle. The candidate must be a team player, self-motivated, possess good communication skills, and able to work in a fast-paced environment across international sites.

Requirements/Qualifications

• Key Responsibilities: Architect and design performance critical analog and mixed signal blocks including DACs and ADCs. Own schematic design and simulation at the IP and system level to meet performance, area, power, and reliability targets. Supervise circuit layout through close collaboration with layout engineers on floor planning, device matching, routing, shielding, and ESD strategies. Work with system design team to translate top-level product requirements into detailed block-level budgets and circuit specifications. Supervise validation and debug as needed, including lab bring up, bench measurement, correlation to simulations, and root-cause analysis of silicon issues. Collaborate with foundry technology team to ensure proper use of PDKs and models, focusing on device reliability constraints.
• Job Requirements: 12+ years experience designing high speed and analog circuits including DACs, ADCs, bandgaps, high accuracy bias blocks, and comparators. Broad experience in the development of both sigma-delta and SAR based ADC architectures. Proficiency with industry-standard design tools, including Cadence Virtuoso, Spectre, and Matlab. Hands-on experience with lab testing and debug of analog blocks. Hands-on experience in scripting and automation (Skill, Python, Tcl, etc.). Strong fundamentals with respect to circuit theory, design, and layout including noise, linearity, device non-idealities, parasitics, and on-chip matching networks. Strong analytical and problem-solving skills. Well organized, methodical, and detail oriented. Excellent verbal communication, documentation, and presentation skills. Self-motivated team player who can work with various cross-functional groups across different sites. BSEE minimum, MSEE+ preferred from an accredited engineering school.