Senior Systems Prototyping Engineer

Are you passionate about DGX system connecting multiple ASIC chips together and FPGA prototyping? Are you interested in pushing the boundaries of innovation to make FPGA prototypes faster and more efficient? Can you work in a fast-paced environment that requires coordination between many teams across geographies and resolving sophisticated problems daily? If so, we are looking for hardworking systems engineers who will craft FPGA prototypes of our next generation GPUs, SOCs, NICs, and Switches on standard FPGA prototyping platforms.

About the role

We are now looking for a Senior Systems Prototyping Engineer to join our Emulation team onsite in Santa Clara, CA.

Responsibilities

• Build FPGA prototypes by making RTL FPGA-friendly, partitioning the design, and taking it through synthesis and place and route.
• Improve performance of the prototype, analyze timing, and generate bit streams.
• Bring up the design on FPGA prototyping platforms and engage in problem solving.
• Release the prototype to customers and support them when they face problems.
• Understand the design and implementation, define the configurations, develop/modify the bring-up and testing infrastructure, and verify the correctness of the design.
• Understand the system topologies with multiple ASICs to realize the DGX systems on prototyping platforms and emulators.
• Coordinate with architects, designers, verification engineers, and SW teams to accomplish tasks.

Requirements

• BS (or equivalent experience) in Electrical Engineering, Computer Engineering, or related fields with 7+ years of experience, or MS with 5+ years of proven experience in FPGA prototyping.
• Good understanding of FPGA prototyping architecture, devices, flows, and tools.
• Experience in backend flows of FPGA Prototyping - Synthesis, P&R, and Timing closure, with emphasis on Synopsys Protocompiler or Synplify Premier and Xilinx Vivado.
• Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB).
• Knowledge of Verilog, System Verilog, and digital design concepts.
• Understand industry-standard protocols like PCIe, CXL, NVLINK, USB, CHI, and CPU-GPU Coherency.
• Good debugging and problem-solving skills.
• Hands-on experience with lab FPGA debug methodologies, tools (Identify or ChipScope), and lab debug equipment (oscilloscopes, logic analyzers).

Skills

• Scripting knowledge (Perl/shell/Tcl) is desired.
• Good documentation, communication, and interpersonal skills.
• Experience with memory bring-up of Memory (LPDDR5/6, DDR5/6), CXL/PCIE, and/or high-speed I/F such as USB4/3 is desirable.
• Prior experience with hardware emulation or prototyping (Synopsys HAPS, Zebu, Mentor Veloce) of a high-performance processor or SOC is a plus.

About the company

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence.

Pay

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits.