Senior Staff Test Engineer - Technology & Solutions
About the role
Own end-to-end 93K test program development for Automotive Ethernet PHY/Switch ICs/Sensor bridge (100BASE-T1, 1000BASE-T1)
Define test strategy, test plans, guard banding, and production release criteria aligned to automotive quality requirements
Lead silicon bring-up, bench-to-ATE correlation, PLL/clock characterization, and PVT margin analysis
Implement DFT-based test: scan, at-speed scan, MBIST/LBIST, JTAG, and ATPG pattern execution
Drive yield improvement, false-fail reduction, test time optimization, and CP/FT correlation
Support QUAL/ATEQ readiness, automotive quality documentation, and production change control
Lead RMA/customer return investigations and RCA/CAPA with FA and Quality teams
Mentor engineers and drive 93K coding standards, reusable frameworks, and NPI process improvements.
Responsibilities
- Own end-to-end 93K test program development for Automotive Ethernet PHY/Switch ICs/Sensor bridge (100BASE-T1, 1000BASE-T1)
- Define test strategy, test plans, guard banding, and production release criteria aligned to automotive quality requirements
- Lead silicon bring-up, bench-to-ATE correlation, PLL/clock characterization, and PVT margin analysis
- Implement DFT-based test: scan, at-speed scan, MBIST/LBIST, JTAG, and ATPG pattern execution
- Drive yield improvement, false-fail reduction, test time optimization, and CP/FT correlation
- Support QUAL/ATEQ readiness, automotive quality documentation, and production change control
- Lead RMA/customer return investigations and RCA/CAPA with FA and Quality teams
- Mentor engineers and drive 93K coding standards, reusable frameworks, and NPI process improvements.
Requirements
- Masters or Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related discipline
- 7+ years of semiconductor test engineering experience with on Advantest V93000 (93K) in a production environment
- Proven Automotive NPI ownership from test concept through HVM release
- Strong DFT/scan/MBIST/JTAG and ATPG execution experience
- Experience with mixed-signal/PHY test: PLL/clock validation, analog parametric characterization, Tx/Rx path testing
- Experience with CP/FT flows, manufacturing ramp, and OSAT collaboration
- Automotive quality knowledge: AEC-Q100, IATF 16949, PPAP, FMEA, ISO26262 (plus)
- Scripting/data skills: Python, C/C++, JMP, SQL (preferred)
Qualifications
- Proven experience in semiconductor test engineering
- Experience with Advantest V93000 (93K) in a production environment
- Strong understanding of automotive quality standards and processes
- Experience with DFT/scan/MBIST/JTAG and ATPG execution
- Experience with mixed-signal/PHY test: PLL/clock validation, analog parametric characterization, Tx/Rx path testing
- Experience with CP/FT flows, manufacturing ramp, and OSAT collaboration
- Experience with automotive quality standards: AEC-Q100, IATF 16949, PPAP, FMEA, ISO26262 (plus)
- Experience with scripting and data skills: Python, C/C++, JMP, SQL (preferred)
Skills
- Strong DFT/scan/MBIST/JTAG and ATPG execution experience
- Experience with mixed-signal/PHY test: PLL/clock validation, analog parametric characterization, Tx/Rx path testing
- Experience with CP/FT flows, manufacturing ramp, and OSAT collaboration
- Experience with automotive quality standards: AEC-Q100, IATF 16949, PPAP, FMEA, ISO26262 (plus)
- Experience with scripting and data skills: Python, C/C++, JMP, SQL (preferred)
Benefits
San Jose, CA - Minimum of $147,400 Salary per year / Maximum of $202,700 Salary per year
All employees will be eligible to participate in an incentive plan.
Pay
San Jose, CA - Minimum of $147,400 Salary per year / Maximum of $202,700 Salary per year
Schedule
Full-time