Senior Principal Engineering Technologist

What you’ll achieve

• Lead advanced investigations and prototypes, aligning outcomes to product architecture and strategy.
• Partner with leaders to resolve technical risks and keep paths to productization clear.
• Contribute to dashboards and insights that improve predictability and performance.
• Act as the technical lead and subject-matter expert for Power Integrity (PI) across multiple platforms and products.
• Define and own end-to-end power delivery network (PDN) architecture, from voltage regulator modules (VRMs) through PCB, package, and die.
• Establish target impedance profiles, noise budgets, and transient performance requirements.
• Lead system-level PI design and analysis, including: DC IR drop analysis, AC impedance and resonance characterization, transient response and load step behavior.
• Drive pre-layout and post-layout PI simulations and sign-off criteria.

Essential Requirements

• 10+ years of experience in power integrity, power delivery, or related areas.
• Deep expertise in: Power delivery network (PDN) design and optimization, Target impedance methodology, DC and AC power analysis, High-speed system power requirements.
• Proven track record of delivering robust power solutions in high-performance systems to production.
• Expert-level proficiency with PI tools: Cadence Sigrity PowerSI / OptimizePI, Ansys SIwave / HFSS, Keysight ADS (PI analysis).
• Strong understanding of: VRM design and control loops, Decoupling strategies and capacitor behavior (ESR, ESL), PCB and package parasitics.

Desirable Requirements

• Typically requires 12+ years of related experience in a professional role with a Bachelor's degree; or 8+ years with a Master's degree; or 5+ years with a PhD; or equivalent experience.
• Patents or publications demonstrating technical leadership.

Compensation

Dell is committed to fair and equitable compensation practices. The salary range for this position is $199,750 – $258,500.