Senior Principal, Design Engineering

We are seeking a high-impact, visionary Senior Principal AI Engineer to architect, design, and oversee the next generation of our enterprise hardware intelligence platform. In this role, you will be the change agent across our global R&D organization, bridging the gap between advanced Generative AI and complex hardware engineering. Reporting into the Office of the VP of Engineering, you will spearhead the technical development of our "Celestica-Tuned Enterprise LLM," transforming massive, highly complex repositories of global engineering data into active, predictive, and autonomous design intelligence.

Responsibilities

• Drive Strategic AI Implementation: Set the technical standard for secure LLM applications within Celestica, utilizing advanced proprietary data and secure infrastructure to build a highly reliable, zero-hallucination platform for high-stakes engineering.
• Develop Digital Twin Capabilities: Architect and integrate digital twin models to simulate and validate physical hardware performance, enabling virtual prototyping and early design cycle optimization.
• Architect & Code the Platform: Act as the primary hands-on developer to design, build, and deploy a multi-database, topology-aware RAG system capable of accurately vectorizing complex hardware design data.
• Build End-to-End AI Pipelines: Create specialized parsers and ingestion pipelines that translate dense binary files, netlists, and graphical schematics into high-dimensional graph-based semantic embeddings.
• Develop Multi-Agent Orchestrations: Leverage advanced orchestration frameworks and the Model Context Protocol (MCP) to develop autonomous AI agents that can manage multi-tool workflows across synthesis, physical placement, and manufacturing sign-off.
• Integrate Cross-Domain Data: Engineer data lakes that seamlessly correlate unstructured text (supply chain metadata, manufacturing datasheets, standard compliance checks) with physical engineering physics (layout geometries, pin connectivity).
• Collaborate with Hardware SMEs: Work side-by-side with Principal Hardware, SI/PI, and Thermal Engineers to encode deep domain expertise, design rules, and hardware guardrails directly into the AI system's "Agent Skills."

Requirements

• Industry Experience: 10+ years of rigorous software engineering experience, including a minimum of 5 years of dedicated, hands-on production coding in Large Language Model (LLM) application development, Natural Language Processing (NLP), or advanced Machine Learning architectures.
• Hardware Lifecycle Engineering: Proven track record of architecting and deploying AI-driven tools specifically tailored for the Electronic Design Automation (EDA) and hardware engineering lifecycle. You must understand how to ingest and manipulate complex hardware data (e.g., schematics, PCB layouts, netlists, and BOMs).
• Advanced Technical Stack: Expert-level coding proficiency in Python and deep learning frameworks (PyTorch/TensorFlow). Proven ability to design, build, and scale high-performance vector databases (e.g., ChromaDB, Milvus, Pinecone).
• AI/LLM Mastery: Mastery of advanced LLM orchestration and agentic frameworks (e.g., LangChain, LlamaIndex). Demonstrated experience building complex, multi-database Retrieval-Augmented Generation (RAG) pipelines and autonomous multi-agent systems.

Qualifications

• Education: Master’s degree (M.S.) in Computer Science, Data Science, Electrical Engineering, or a closely related technical discipline is required. A Ph.D. specializing in AI/ML/DL, Agentic AI or Data Science is highly preferred.
• Advanced AI Expertise: Deep experience in Artificial Intelligence (AI), Machine Learning (ML), Deep Learning (DL), and Large Language Models (LLMs).
• Modern AI Tools & Agents: Strong familiarity with the latest LLMs and autonomous AI agents (e.g., Glean, Gemini Enterprise, Vertex AI, and Anthropic Claude).
• Hardware Engineering Lifecycle: Comprehensive understanding of the end-to-end hardware engineering process for hyperscalers, including schematics, Signal Integrity (SI), Power Integrity (PI), PCB layout, thermal, and mechanical design.
• EDA & CAD Software: Familiarity with industry-leading Electronic Design Automation (EDA) and engineering tools (e.g., Cadence Allegro, Siemens EDA, Cadence Sigrity, Keysight ADS, PTC Creo, and Simcenter Flotherm).

Pay

Base Salary: $210,868 - $329,857. The stated range includes Base Salary and target Short-Term Incentive (STI) compensation only. A comprehensive benefits package is offered in addition to this range.