Senior Principal Analog Design Engineer

Responsibilities

• Lead the design and development of high-performance analog power management ICs, ensuring best-in-class efficiency, power density, and reliability.
• Collaborate with system engineers to define product architecture and specifications, balancing performance, power, and cost requirements.
• Select and implement optimal circuit topologies, ensuring robustness, yield, and manufacturability.
• Conduct transistor-level design, simulation, and validation to meet functional and performance specifications.
• Engage with global design teams, including colleagues in Asia, to align on development strategies and execution plans.
• Partner with test and characterization engineers to define validation methodologies, troubleshoot design issues, and optimize production test strategies.
• Drive technical reviews and documentation, presenting design decisions, analysis, and trade-offs to internal stakeholders.

Requirements

• A minimum of a bachelor’s degree in electrical engineering
• 15+ years of engineering experience (or an equivalent amount of education and expereience)
• Working in the semiconductor industry for 8+ years with analog and mixed-signal Integrated circuit (IC) design, with DC-DC power converter architectures and control methodologies such as voltage mode control and current mode control
• Ability to communicate highly technical concepts effectively to both technical and non-technical stakeholders
• Experience working in Electronic Design Automation (EDA) tools such as EMIR tools capacitive coupling tools and flows, parasitic extraction tools, floating nodes, etc.
• Experience with production release of power management ICs

Qualifications

• Masters or PHD in Electrical Engineering
• Hands-on lab experience supporting high frequency switching power supplies in the semiconductor power management industry

Skills

• Strong understanding of analog and digital circuits
• Experience with power management IC design
• Knowledge of EDA tools and techniques
• Excellent communication and collaboration skills

Benefits

Competitive base salary commensurate with experience: $193,100 - $251,100, relevant for the California Bay Area (subject to change dependent on physical location)

Pay

Base compensation is one element of Total Rewards offered at Qorvo. More information on the Total Rewards package can be shared upon request.

Schedule

This is a hybrid position where the expectation is to be onsite multiple days a week at either our Richardson TX or San Jose CA office.