Senior Package Layout Engineer - Hardware
About the role
NVIDIA is seeking a Senior Package Layout Engineer to join our team. This position involves collaborating with Technical Package Lead and different design teams to develop sophisticated, detailed layouts for IC substrates used in NVIDIA products. Key responsibilities include implementing high-speed/density ASIC packages, performing substrate breakout patterns, optimizing package pinouts, conducting design feasibility studies, and developing symbols and CAD libraries.
Responsibilities
- Collaborate with Technical Package Lead and design teams to implement high-speed/density ASIC packages.
- Perform substrate breakout patterns for ASIC packages.
- Optimize package pinout incorporating system-level trade-offs of pin assignments.
- Help perform package routing, placement, stack-up, reference plane, and power distribution using Cadence APD or SiP tool suite.
- Propose layout design trade-offs to the Technical Package Lead for resolution and implementation.
- Conduct design feasibility studies to evaluate package design goals for size, cost, and system performance.
- Develop symbols and CAD library databases using Cadence APD design tools.
- Develop methodologies to improve layout productivity.
Requirements
- Hold a B.S. in Electrical Engineering or equivalent experience.
- 5+ years of experience in PCB Layout of graphics cards, motherboards, line cards, or other related technology.
- Experience with HDI designs is a plus.
- Proven experience in substrate layout of wire bond and flip chip packages.
- Significant background with Cadence APD or SiP and/or PCB layout tools (including Constraint Manager).
- Solid understanding of high-speed design signal integrity practices.
- Experience with Virtuoso and Calibre is a plus.
- Experience using Valor is helpful.
Qualifications
- Strong understanding of semiconductor device physics and packaging technologies.
- Experience with advanced packaging techniques such as fan-out, fan-in, and multi-chip modules.
- Knowledge of electrical engineering principles and their application to IC packaging.
- Ability to work independently and manage multiple projects simultaneously.
Skills
- Proficiency in Cadence APD or SiP tool suite.
- Experience with high-speed design signal integrity practices.
- Strong problem-solving skills and attention to detail.
- Excellent communication and collaboration skills.
Benefits
NVIDIA offers a competitive compensation package including base salary ranging from $136,000 to $212,750 for Level 3 and $168,000 to $258,750 for Level 4, along with equity and comprehensive benefits.
Pay
Base salary range: $136,000 - $212,750 for Level 3, $168,000 - $258,750 for Level 4.
Schedule
Full-time position.
Contact
To apply, please visit our careers page at [Insert Application Link Here]. Applications will be accepted until June 30, 2026.