Senior Mixed Signal Design Engineer
About the role
This position is available within NVIDIA's Mixed Signal team. The team focuses on designing CMOS high-speed interface circuits and mixed-signal circuits.
Responsibilities
- Lead design and implementation of high speed interface circuit
- Design, simulation, and verification of mixed-signal circuits
- Supervise closely IC circuit/mask designers, provide floorplan and layout guidelines
- Support lab characterization of silicon
- Tackle challenges of circuit design in deep submicron CMOS
- Work with multi-functional teams
Requirements
- MS in Electrical Engineering or equivalent experience
- 4+ years of design experience in CMOS analog / mixed-signal circuit design
- Solid understanding of Cadence custom design tools, circuit simulator, timing analysis tool
- Great teammate with good interpersonal skills
- Proven experience in crafting and mentoring designers
- Extensive experience in Tx, Rx, CDR, PLL for high speed IO interfaces
- In-depth understanding of deep submicron CMOS process and related circuit design issues
- Experience in silicon bring-up, debugging and use of lab instrumentation
- Knowledge in system level timing budget, signal integrity, and power integrity (a plus)
- Experience in Verilog, Matlab, Primetime, Nanotime
Qualifications
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is $196,000 - $310,500 for Level 5, and $232,000 - $368,000 for Level 6. You will also be eligible for equity and benefits.
Benefits
NVIDIA offers a comprehensive benefits package including health insurance, retirement plans, and paid time off.
Pay
The base salary for this role is determined based on your location, experience, and the pay of employees in similar positions. The base salary range is $196,000 - $310,500 for Level 5, and $232,000 - $368,000 for Level 6.
Schedule
The schedule for this role is full-time.
Skills
Strong hands-on experience in the lab with silicon validation, debugging, characterization and bring up.
Contact Information
Applications for this job will be accepted at least until April 20, 2026.