Senior IP Verification Engineer

About the role

This specific role will be part of a front-end multi-media IP team responsible for a varied set of multi-media focused IP's.

What You Will Be Doing

Depending on individual project requirements, you will be working on some or some of the below typical activities:

• Participate and help drive the development of NVIDIA multi-media IP designs with emphasis on first pass success.
• Collaborate and partner with ASIC design engineers, IP architects and other verification engineers to formalize product features
• Verify IP's using System Verilog and UVM
• Build testbenches and enhance flows for automation of unit level trace based testing against reference C models
• Architect and build verification architecture and associated documents
• Develop simulation models
• Regression management across HLS, Verilog, and FPGA simulations
• Performance testing and analysis
• Functional and code coverage tracking and closure
• Help the team advance verification techniques and methodology
• IP integration testing into full chip environment

What We Need To See

• BS/MS Electrical or Computer Engineering (or equivalent experience)
• 5+ years of proven design verification experience
• Expertise in verifying sophisticated IP's with System Verilog
• Experience with verifying High-Level-Design (HLS) designs a plus
• Programming and scripting experience with C and Python
• Familiar with using AI enabled IDE's for code development
• You have excellent written, verbal and technical communication skills
• Demonstrate use of out-of-box thinking for creative solutions to highly sticky problems

Pay

The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits.