Jobs · Washington

Senior Formal Verification Engineer - LPU

NVIDIA · Washington, United States · 1 mo ago
HybridFull-time

About the role

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people! Today, we’re tapping into the unlimited potential of AI to define the next era of computing. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work.

As a Senior Formal Verification Engineer at NVIDIA, you will verify ASICs developed at the forefront using formal verification tools. You will define the verification scope and ensure correctness. You will employ sophisticated formal techniques to acquire sufficiently bounded proofs while working with architects, designers, and pre- & post-silicon verification teams to accomplish your tasks, as well as improve formal verification methodologies and flows.

Responsibilities

  • Verify AI-related sophisticated ASIC designs & features with formal verification methods.
  • Partner with architecture/RTL teams to specify properties, resolve deep design issues, and influence micro-architecture decisions.
  • Leverage and unleash the power of formal verification to rigorously verify critical design properties and ensure compliance with specifications, as well as minimize spec ambiguities.
  • Articulate formal verification coverage to partners.
  • Develop and implement advanced formal verification environments and methodologies for complex ASIC designs, including automated flows for scalability and efficiency.
  • Train and coach junior engineers on formal techniques and standard processes; Help on methodology/FAQ documentation.
  • Support silicon bring-up and debug using formal methods where it applies.

Requirements

  • BS/MS/PhD or equivalent experience in CS/CE/EE.
  • 12+ years in ASIC verification with 8+ years focused on formal verification methods.
  • Mastery of SystemVerilog Assertions (SVA) and formal property verification.
  • Proficient on at least one popular formal verification tool in the industry (JapserGold, VC Formal, etc.).
  • Good scripting skills for flow automation (tcl, python, etc.).
  • Good written and oral communication skills.
  • Keen attention to details.

Skills

  • Shown success in full-cycle formal sign-off for complex designs.
  • Expertise in formal apps: FPV apps, sequential equivalence checks, datapath verification, etc.
  • Deep understanding of GPU or LPU architecture/design.

Pay

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 196,000 USD - 310,500 USD. You will also be eligible for equity and benefits.

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