Senior Failure Analysis Engineer (Semiconductor / Electronics)

About the role

Eurofins EAG Laboratories is seeking a Senior Failure Analysis Engineer to lead hands-on investigations of electronic components, packages, and systems. You will work directly in the lab owning failure analysis from problem definition through root cause and client recommendations. This role is best suited for someone who enjoys deep technical debugging, operates lab tools independently, and can translate complex data into clear, actionable conclusions.

Responsibilities

• Perform hands-on failure analysis on semiconductor devices and electronic components (ICs, subcomponents, systems)
• Design and execute analytical plans to determine root cause of electrical/mechanical failures
• Use and interpret results from tools such as: X-ray, SEM/EDS, FA isolation techniques, and electrical characterization tools
• Analyze ATE datalogs, schematics, and test results to diagnose issues
• Lead or contribute to fault isolation and deprocessing workflows
• Review, validate, and approve lab data and technical reports
• Communicate findings to internal teams and external clients in clear, practical terms
• Identify process improvements to increase lab throughput and reduce repeat failures
• Support cross-functional collaboration with lab staff to manage workflow, quality, and priorities

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering or related field
• 8+ years of hands-on failure analysis experience in semiconductor or electronics environment
• Demonstrated experience with multiple FA techniques and tools, such as: Electrical characterization (curve trace, parametric analysis, oscilloscope), Fault isolation (e.g., OBIRCH, emission microscopy, thermal techniques), Deprocessing and sample prep (e.g., RIE, FIB/PFIB, lapping, etching), Physical analysis (SEM/EDS, cross-sectioning, X-ray, C-SAM)
• Working knowledge of device physics, IC layout, and semiconductor processes
• Ability to review and write technical reports for internal or customer use
• Ability to work onsite in a lab environment daily and handle multiple active analyses

Preferred Experience

• With advanced nodes (e.g., FinFET) or complex packaging
• Familiarity with industry standards (JEDEC, IPC, MIL-STD, AEC)
• Experience supporting external customers or client-facing technical discussions
• Exposure to LabView, GDS layout tools, or similar systems

Benefits

• Medical, Dental and Vision Coverage
• 401k Company Matching
• Paid Time Off
• Wellness Program
• Education Assistance