Senior Engineer (Andover, MA)

About the role

Supports the design and development of state-of-the-art digital power controllers.

Responsibilities

• Responsible for digital design, design verification, and analysis.
• Run system-level digital/behavioral simulations and correlate to real-time hardware lab measurements.
• Interact with the embedded firmware team to evaluate and verify chip-level functionality.
• Plan and execute unit/subsystem/system level design and verification using SystemVerilog and UVM.
• Build scalable and reusable test benches in System Verilog/UVM to develop checkers, monitors, scoreboard, and cover points.
• Perform code and cover-point coverage analysis and enhance tests to maximize coverage.
• Perform early design analysis including lint, CDC and RDC.
• Implement STA and UPF constraints for synthesis and P&R.
• Provide technical documentation of system implementation and behavior.

Requirements

• Requires a Bachelor’s degree in Computer Science, Computer Engineering, or related field.
• Experience or coursework in: Digital or electronics design and verification;
• Analytical computational tools (Matlab, Python or equivalent);
• Circuit simulation and analysis tools (Spice, Simetrix, SIMPLIS, NL5);
• Verilog/SystemVerilog;
• RTL digital simulator on Unix/Linux environment (Xcelium, ModelSim, NCsim, or equivalent);
• RTL verification methodologies and working knowledge of UVM;
• Methodologies for FPGA emulators and hardware prototype-based verification;
• Microcontroller-based architectures and programming languages (ARM, C);
• Software tool automation and Scription languages (Perl, Tcl, Python);
• Lab environment automation and data capture.

Qualifications

Local telecommuting permitted up to 2 days per week.

Benefits

Not specified.

Skills

Not specified.

Benefits

Not specified.

Pay

$100,610 – 110,671 per year

Schedule

Not specified.