Senior Embedded Software Engineer

Job Responsibilities

• Independently design, implement, validate, and maintain embedded and systems-level software subsystems supporting real-time quantum error correction and control.
• Translate quantum error-correction requirements (code distance, syndrome rates, latency budgets) into concrete classical compute, memory, and interconnect requirements.
• Design systems that meet deterministic latency, bandwidth, and reliability requirements across CPU, GPU, FPGA, and high-speed interconnect domains.
• Serve as the technical point-of-contact for NVIDIA NVQLink integration, including topology, bandwidth modeling, latency characterization, and failure modes.
• Involves direct interaction with NVIDIA personnel as well as HPC experts in academia and US national labs.
• Collaborate closely with Quantum Software, Physics, Electrical, and Systems Engineering to co-design hardware/software interfaces.
• Troubleshoot and resolve complex performance, scaling, and integration issues spanning firmware, drivers, OS (Embedded Linux / bare-metal environments), GPU runtimes, and hardware.
• Develop and maintain validation infrastructure, performance benchmarks, and test harnesses for deterministic behavior and scaling.
• Provide informal mentorship through design reviews, code reviews, and technical guidance.

Requirements

• A degree (PhD preferred) in Computer Engineering, Electrical Engineering, Computer Science, or related field with experience in high-performance computing (HPC).
• Demonstrated experience owning complex embedded or systems-level software subsystems end-to-end.
• Strong experience with C/C++ in performance-critical systems.
• Experience debugging across software and hardware boundaries (drivers, firmware, interconnects, timing).
• Solid understanding of computer architecture fundamentals (memory hierarchies, interconnects, latency vs throughput tradeoffs).
• Experience with hardware/software co-design for quantum control systems.
• Experience working in Linux-based embedded or HPC environments.
• Familiarity with GPU programming models (CUDA or equivalent) at a systems level.
• We highly value high-performance computing (HPC) systems design or deployment.
• Familiarity with NVIDIA CUDA-Q, Direct experience with NVIDIA Holoscan Sensor Bridge, RDMA over Converged Ethernet, or similar high-speed coherent interconnects.
• Experience supporting or developing error-correction decoding pipelines (quantum or classical).
• Background similar to advanced academic research groups in quantum architectures or decoding (e.g., large-scale syndrome decoding research).
• Experience performance-modeling compute systems as a function of problem size and algorithmic complexity.
• Exposure to FPGA-accelerated or heterogeneous compute systems.
• Detail-oriented mindset with a strong sense of ownership and technical accountability.
• Positive, collaborative working style and enthusiasm for mentoring and developing engineers.