Jobs · Information Technology · California

Senior DFT Engineer

NVIDIA AI · Santa Clara, CA · Today
HybridInformation TechnologyFull-time

About the role

NVIDIA's DFX team is looking for an exceptional DFT Engineer to help shape the future of compute. As stewards of the entire Scan Test Lifecycle, we drive innovation for the most advanced silicon in the world—spanning 2.5D/3D AI data center platforms, Gaming and Enterprise GPUs, and complex SOCs powering Autonomous Machines, Robotics, and Industrial systems. You will innovate at scale, designing and prototyping breakthrough Test Architectures for reticle sized, multi-chiplet products—from RTL to verification to post-silicon ATE bring-up. Join a globally recognized team that consistently delivers breakthrough performance across multiple high-impact tape-outs each year.

Responsibilities

  • Develop and deploy Industry-leading test methodologies on NVIDIA's next-generation silicon platforms.
  • Collaborate with leading EDA vendors to shape tool capabilities that meet NVIDIA's ambitious design goals, and partner with internal CAD teams to drive scalable, automated solutions.
  • Co-architect novel DFT strategies alongside VLSI and Product Engineering teams to push the boundaries of silicon test innovation.
  • Own the full ATPG lifecycle—verification, coverage analysis, pattern generation, and ATE bring-up—across NVIDIA's full product portfolio.
  • Guide and mentor junior engineers, helping them navigate complex design trade-offs to achieve world-class quality and efficiency.

Requirements

  • MS/PhD or equivalent experience in Electrical Engineering or a related field
  • 6+ years of hands-on experience in Design-For-Test (DFT)
  • Deep knowledge of DFT tools, methodologies, and test strategies for complex, large-scale designs
  • Strong experience with industry standard ATPG tools
  • Clear, effective communicator—strong written and verbal skills
  • Passion for mentoring and scaling technical excellence in a team

Qualifications

  • Experience with 2.5D/3D ICs, multi-chiplet architectures, or reticle-sized designs
  • Background in developing or enhancing EDA tool flows
  • Experience with Silicon testing and Automatic Test Equipment (ATE)
  • Expertise in using programming languages and AI for automation
  • Personal success stories in leading org wide changes

Pay

The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits.

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