Jobs · Engineering · California

Senior Analog and Mixed Signal Engineer

NVIDIA · Santa Clara, CA · 1 mo ago
EngineeringFull-time

About the role

Join our global circuits team at NVIDIA that designs state-of-the-art GPUs for applications such as supercomputers, gaming consoles, and self-driving cars. Our team focuses on the architecture and design of CMOS high-speed chip interfaces and complex analog functions.

Responsibilities

  • Design and implement high-speed interfaces and complex mixed-signal circuits using state-of-the-art sub-micron CMOS technologies and various EDA tools, including:
    • High-speed analog and hybrid Phase Locked Loops (PLLs) and associated subblocks (VCO, charge-pump, dividers, state machines, LDO, bandgap, TDC, interpolator circuits, high-speed buffers).
    • Data converters (analog-to-digital and digital-to-analog converters).
    • Architecture development and transistor-level circuit design of associated blocks (comparators, digital state machines, high-performance op-amps).
  • Work closely with mask design engineers to deliver physical design and collaborate with characterization groups for silicon evaluation.
  • Support technology transfer to product development teams.
  • Conduct architecture studies, circuit designs and simulations, floor-planning, instruct mask designers, perform reliability verifications, and assist in silicon bring-up.

Requirements

  • BSEE or equivalent experience (MS preferred).
  • 6+ years of industry experience in deep-submicron CMOS technologies.
  • Analytical and intuitive understanding of transistor-level analog design, layout, and simulation.
  • Hands-on design experience in performance analog and hybrid Phase Locked Loops, analog-to-digital (ADC), and digital-to-analog (DAC) data converters.
  • Experience with analog subcells such as VCO, LDO, bandgap, charge pump, op-amps, and interpolator circuits.
  • Experience in deep sub-micron processes.

Skills

  • Proficiency with simulation tools such as Spectre, HSPICE, AFS, MATLAB, SystemVerilog, and Python.
  • Experience with Cadence custom circuit design tools like ADE-L and ADE-XL.
  • Understanding and experience running Monte-Carlo, noise simulations, and stability analysis.
  • Capability to interpret DRC and LVS results using verification tools (Calibre, ICV, or similar).
  • Scripting proficiency in Perl, Python, or MATLAB is a plus.
  • Experience with digital PLL, TDC, or DSP and control theory related to digital PLLs is a plus.
  • Strong ability to learn and explore new technologies, with good analytical skills.
  • Effective teamwork, interpersonal skills, enthusiasm, and positive energy.

Pay

The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5. You will also be eligible for equity and benefits.

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