Research Engineer - Mid-Training

About the role

Voltai is developing world models and agents to learn, evaluate, plan, experiment, and interact with the physical world. Starting with understanding and building hardware, including electronics systems and semiconductors, where AI can design and create beyond human cognitive limits.

About the Team

Backed by Silicon Valley’s top investors, Stanford University, and CEOs/Presidents of Google, AMD, Broadcom, Marvell, etc. We are a team of previous Stanford professors, SAIL researchers, Olympiad medalists (IPhO, IOI, etc.), CTOs of Synopsys & GlobalFoundries, Head of Sales & CRO of Cadence, former US Secretary of Defense, National Security Advisor, and Senior Foreign-Policy Advisor to four US presidents.

Responsibilities

• Train frontier models to become highly knowledgeable semiconductor design and verification experts that serve as the foundation for reinforcement learning and automated chip development.
• Develop methods for generating and curating synthetic design data, performing model distillation, and enabling continual learning at scale.
• Work closely with hardware engineers, RL researchers, and verification specialists to create evals that guide design data quality and model improvement.
• Collaborate with compute engineers to scale efficient training across thousands of GPUs and RL environments.
• Build high-performance tools to investigate how data and simulation shape model-driven design intelligence.

Requirements

Mid Training positions require experience with:

• Training LLMs or foundation models on semiconductor design and verification corpora (e.g., RTL, netlists, PDKs, simulation logs)
• Modeling design scaling laws and optimizing compute budgets for chip-design-specific workloads
• Generating large-scale synthetic design data (e.g., RTL variants, testbenches, verification traces)
• Building evals that correlate with downstream design metrics (e.g., timing closure, power, area, verification coverage)

Qualifications

Preferred qualifications include:

• Experience with training large language models or foundation models on semiconductor design and verification corpora
• Knowledge of design scaling laws and optimization techniques for chip design
• Experience in generating and curating synthetic design data
• Ability to build evaluation metrics that correlate with downstream design metrics

Skills

Essential skills required include:

• Strong background in semiconductor design and verification
• Experience with reinforcement learning and automated chip development
• Proficiency in Python, C++, and other relevant programming languages
• Understanding of hardware design and simulation tools
• Excellent problem-solving and analytical skills

Benefits

At Voltai, we offer:

• Competitive compensation packages
• Flexible working hours
• Continuous professional development opportunities
• Collaborative and inclusive work environment

Pay

Salary range: $150,000 - $200,000 annually

Schedule

Full-time position, 40 hours per week