Regional Principal Product Application Engineer (Asia)

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. The company’s Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up and scale-out connectivity. The custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements.

About the role

As an Astera Labs Principal Product Application Engineer, you will provide technical guidance to customers to overcome design challenges, generate collateral for existing and new products, and drive innovation by providing insightful feedback to internal teams to continuously improve products and processes. This role focuses on development, debugging, and design-in activities for customers in the China region and coordinates with local development teams at Astera Labs Headquarters. The role requires working approximately from 12:00 PM to 9:00 PM PST to enable real-time collaboration with stakeholders in the Asia Pacific time zone.

Responsibilities

• Provide technical guidance to customers to resolve design challenges.
• Generate technical collateral for existing and new semiconductor products.
• Drive innovation by offering feedback to internal teams for product and process improvements.
• Support silicon/system bring-up and debug in customer systems.
• Take technical ownership of issue resolution, directing internal teams and communicating with customers, FAEs, and sales teams.
• Use lab equipment such as protocol analyzers/exercisers, high-speed oscilloscopes, or BERTs for debugging.
• Work with software/firmware associated with semiconductor products, including firmware development in C and scripting in Python or equivalent languages.
• Triage complex customer-reported issues involving multiple layers (silicon, firmware, hardware board design, system environment).

Requirements

• Strong academic and technical background in electrical engineering; Bachelor’s in EE required, Master’s preferred.
• Minimum of 3 years’ experience designing in complex SoC/silicon products with high-speed interfaces (PCIe preferred).
• Full professional proficiency in Mandarin (written and spoken) to communicate with Asia region customers.
• Entrepreneurial, open-minded behavior with a customer-centric mindset.

Qualifications

• Strong working knowledge of PCIe LTSSM at the physical layer, associated standards, and debug.
• Experience with PCIe 5.0 at a minimum; PCIe 6.0/CXL preferred.
• Hands-on experience with lab equipment such as protocol analyzers, high-speed oscilloscopes, or BERTs.
• Experience with data center BMC implementation and BIOS configuration.
• Development/support experience with PCIe or Ethernet Switch/Retimer products.
• Understanding of data center systems (servers, JBOGs/JBODs, networking switches/routers/interconnects).
• PCIe compliance testing methodology and troubleshooting experience.

Pay

Base salary range is $185,000 to $240,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives, and benefits.